<?xml version="1.0" encoding="ISO-8859-1"?>
<!DOCTYPE x86reference SYSTEM "x86reference.dtd">

<!-- Visit http://ref.x86asm.net/ -->

<!--

Author: Karel Lejska (mazegen gmail com)

Short Description:

This reference is intended to be precise opcode and instruction
set reference (including x86-64). Its principal aim is exact
definition of instruction parameters and attributes.

- Minor Issues:

83/1, 83/4, 83/6:
These short forms of OR, AND, and XOR instructions are documented
since 80386. They were probably working since 8086, 80186
or 80286, but I have no trustworthy information regarding this issue.

D9/3 mod=11, DF/2 mod=11, DF/3 mod=11:
These encodings are documented in Intel 80287 manual at least. They
were probably working since 8086, 80186 or 80286, but I have no
trustworthy information regarding this issue.

0F0D:
I am not sure since which Intel procesor was second multi-byte NOP (0F0D)
released. The reference sets it since Pentium Pro.

0FAE /0 FXSAVE, 0FAE /1 FXRSTOR
Current Intel manuals say that these were introduced with PIII
processor. I can't find them documented in PIII manual though.
Because of this problem, these instructions are marked as introduced
with latter steppings of PIII processor.

- Discussion:

FF /3, FF /5:
Should I add this comment?
"The offset from the target operand is ignored when a call gate is used."

LAR, LSL:
Should I add this comment?
"For all loads (regardless of source or destination sizing) only bits 16-0 are used. Other bits are ignored."

-->

<x86reference version="1.01">

  <one-byte>

    <pri_opcd value="00">
      <entry direction="0" op_size="0" r="yes" lock="yes">
	<syntax><mnem>ADD</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="01">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>ADD</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="02">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>ADD</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="03">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>ADD</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="04">
      <entry op_size="0" attr="acc">
        <syntax>
          <mnem>ADD</mnem>
          <dst nr="0" group="gen" type="b">AL</dst>
          <src><a>I</a><t>b</t></src>
        </syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="05">
      <entry op_size="1" attr="acc">
        <syntax><mnem>ADD</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="06">
      <entry>
	<syntax><mnem>PUSH</mnem><src nr="0" group="seg" type="w" address="S2">ES</src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="07">
      <entry>
	<syntax><mnem>POP</mnem><dst nr="0" group="seg" type="w" address="S2" depend="no">ES</dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="08">
      <entry direction="0" op_size="0" r="yes" lock="yes">
        <syntax><mnem>OR</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="09">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>OR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0A">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>OR</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0B">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>OR</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0C">
      <entry op_size="0" attr="acc">
        <syntax><mnem>OR</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0D">
      <entry op_size="1" attr="acc">
        <syntax><mnem>OR</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0E">
       <entry>
	<syntax><mnem>PUSH</mnem><src nr="1" group="seg" type="w" address="S2">CS</src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="0F">
      <entry doc1632_ref="gen_note_opcd_POP_CS_0F">
	<proc_start post="no">00</proc_start>
	<proc_end>00</proc_end>
	<syntax><mnem>POP</mnem><dst nr="1" group="seg" type="w" address="S2" depend="no">CS</dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry attr="invd">
	<proc_start post="no">01</proc_start>
	<proc_end>01</proc_end>
	<syntax/>
      </entry>
      <entry ref="two-byte">
	<proc_start>02</proc_start>
	<syntax/>
      </entry>
    </pri_opcd>

    <pri_opcd value="10">
      <entry direction="0" op_size="0" r="yes" lock="yes">
        <syntax><mnem>ADC</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="11">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>ADC</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="12">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>ADC</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="13">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>ADC</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="14">
      <entry op_size="0" attr="acc">
        <syntax><mnem>ADC</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="15">
      <entry op_size="1" attr="acc">
        <syntax><mnem>ADC</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="16">
      <entry>
	<syntax><mnem>PUSH</mnem><src nr="2" group="seg" type="w" address="S2">SS</src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="17">
      <entry attr="delaysint">
	<syntax><mnem>POP</mnem><dst nr="2" group="seg" type="w" address="S2" depend="no">SS</dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="18">
      <entry direction="0" op_size="0" r="yes" lock="yes">
        <syntax><mnem>SBB</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="19">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>SBB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1A">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>SBB</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1B">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>SBB</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1C">
      <entry op_size="0" attr="acc">
        <syntax><mnem>SBB</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1D">
      <entry op_size="1" attr="acc">
        <syntax><mnem>SBB</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1E">
      <entry>
	<syntax><mnem>PUSH</mnem><src nr="3" group="seg" type="w" address="S2">DS</src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="1F">
      <entry>
	<syntax><mnem>POP</mnem><dst nr="3" group="seg" type="w" address="S2" depend="no">DS</dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
                        <grp2>segreg</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="20">
      <entry direction="0" op_size="0" r="yes" lock="yes">
        <syntax><mnem>AND</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="21">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>AND</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="22">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>AND</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="23">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>AND</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="24">
      <entry op_size="0" attr="acc">
        <syntax><mnem>AND</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="25">
      <entry op_size="1" attr="acc">
        <syntax><mnem>AND</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="26">
      <entry>
	<syntax>
	  <mnem>ES</mnem>
	  <src nr="0" group="seg" type="w" displayed="no">ES</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>ES segment override prefix</note>
      </entry>
      <entry attr="undef">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(use with any branch instruction is reserved)</note>
      </entry>
      <entry attr="null" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>Null Prefix in 64-bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="27">
      <entry>
	<syntax>
	  <mnem>DAA</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<test_f>ac</test_f><modif_f>oszapc</modif_f><def_f>szapc</def_f><undef_f>o</undef_f>
	<note>Decimal Adjust AL after Addition</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="28">
      <entry direction="0" op_size="0" r="yes" lock="yes">
	<syntax><mnem>SUB</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="29">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>SUB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2A">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>SUB</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2B">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>SUB</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2C">
      <entry op_size="0" attr="acc">
        <syntax><mnem>SUB</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2D">
      <entry op_size="1" attr="acc">
        <syntax><mnem>SUB</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2E">
      <entry>
	<syntax>
	  <mnem>CS</mnem>
	  <src nr="1" group="seg" type="w" displayed="no">CS</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>CS segment override prefix</note>
      </entry>
      <entry>
	<proc_start>10</proc_start>
        <syntax><mnem sug="yes">NTAKEN</mnem></syntax>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>Branch not taken prefix (used only with Jcc instructions)</note>
      </entry>
      <entry attr="undef" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(branch hint prefixes have no effect in 64-bit mode)</note>
      </entry>
      <entry attr="null" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>Null Prefix in 64-bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="2F">
      <entry>
	<syntax>
	  <mnem>DAS</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<test_f>ac</test_f><modif_f>oszapc</modif_f><def_f>szapc</def_f><undef_f>o</undef_f>
	<note>Decimal Adjust AL after Subtraction</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="30">
      <entry direction="0" op_size="0" r="yes" lock="yes">
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="31">
      <entry direction="0" op_size="1" r="yes" lock="yes">
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="32">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>XOR</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="33">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>XOR</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="34">
      <entry op_size="0" attr="acc">
        <syntax><mnem>XOR</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="35">
      <entry op_size="1" attr="acc">
        <syntax><mnem>XOR</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="36">
      <entry>
	<syntax>
	  <mnem>SS</mnem>
	  <src nr="2" group="seg" type="w" displayed="no">SS</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>SS segment override prefix</note>
      </entry>
      <entry attr="undef">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(use with any branch instruction is reserved)</note>
      </entry>
      <entry attr="null" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>Null Prefix in 64-bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="37">
      <entry>
	<syntax>
	  <mnem>AAA</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no">AH</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<test_f>a</test_f><modif_f>oszapc</modif_f><def_f>ac</def_f><undef_f>oszp</undef_f>
	<note>ASCII Adjust After Addition</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="38">
      <entry direction="0" op_size="0" r="yes">
	<syntax><mnem>CMP</mnem><src><a>E</a><t>b</t></src><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="39">
      <entry direction="0" op_size="1" r="yes">
        <syntax><mnem>CMP</mnem><src><a>E</a><t>vqp</t></src><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3A">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>CMP</mnem><src><a>G</a><t>b</t></src><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3B">
      <entry direction="1" op_size="1" r="yes">
        <syntax><mnem>CMP</mnem><src><a>G</a><t>vqp</t></src><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3C">
      <entry op_size="0" attr="acc">
        <syntax><mnem>CMP</mnem><src nr="0" group="gen" type="b">AL</src><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3D">
      <entry op_size="1" attr="acc">
        <syntax><mnem>CMP</mnem><src nr="0" group="gen" type="vqp">rAX</src><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3E">
      <entry>
	<syntax>
	  <mnem>DS</mnem>
	  <src nr="3" group="seg" type="w" displayed="no">DS</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>DS segment override prefix</note>
      </entry>
      <entry>
	<proc_start>10</proc_start>
        <syntax><mnem sug="yes">TAKEN</mnem></syntax>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>Branch taken prefix (used only with Jcc instructions)</note>
      </entry>
      <entry attr="undef" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(branch hint prefixes have no effect in 64-bit mode)</note>
      </entry>
      <entry attr="null" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>Null Prefix in 64-bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="3F">
      <entry>
	<syntax>
	  <mnem>AAS</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no">AH</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<test_f>a</test_f><modif_f>oszapc</modif_f><def_f>ac</def_f><undef_f>oszp</undef_f>
	<note>ASCII Adjust AL After Subtraction</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="40">
      <entry>
        <syntax><mnem>INC</mnem><dst><a>Z</a><t>v</t></dst></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszap</modif_f><def_f>oszap</def_f>
        <note>Increment by 1</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX</mnem></syntax>
	<grp1>prefix</grp1>
        <note>Access to new 8-bit registers</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="41">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.B</mnem></syntax>
	<grp1>prefix</grp1>
	<note>Extension of the r/m field, base field, or opcode reg field</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="42">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.X</mnem></syntax>
	<grp1>prefix</grp1>
	<note>Extension of the SIB index field</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="43">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.XB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.X and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="44">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.R</mnem></syntax>
	<grp1>prefix</grp1>
	<note>Extension of the ModR/M reg field</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="45">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.RB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.R and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="46">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.RX</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.R and REX.X combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="47">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.RXB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.R, REX.X and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="48">
      <entry>
        <syntax><mnem>DEC</mnem><dst><a>Z</a><t>v</t></dst></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszap</modif_f><def_f>oszap</def_f>
        <note>Decrement by 1</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.W</mnem></syntax>
	<grp1>prefix</grp1>
	<note>64 Bit Operand Size</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="49">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4A">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WX</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W and REX.X combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4B">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WXB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W, REX.X and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4C">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WR</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W and REX.R combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4D">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WRB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W, REX.R and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4E">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WRX</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W, REX.R and REX.X combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="4F">
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax><mnem>REX.WRXB</mnem></syntax>
	<grp1>prefix</grp1>
	<note>REX.W, REX.R, REX.X and REX.B combination</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="50">
      <entry>
        <syntax><mnem>PUSH</mnem><src><a>Z</a><t>v</t></src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
        <syntax><mnem>PUSH</mnem><src><a>Z</a><t>vq</t></src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="58">
      <entry>
        <syntax><mnem>POP</mnem><dst><a>Z</a><t>v</t></dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
        <syntax><mnem>POP</mnem><dst><a>Z</a><t>vq</t></dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="60">
      <entry>
        <proc_start>01</proc_start>
	<syntax>
          <mnem>PUSHA</mnem>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
          <src nr="1" group="gen" type="w" displayed="no">CX</src>
          <src nr="2" group="gen" type="w" displayed="no">DX</src>
          <src nr="3" group="gen" type="w" displayed="no">BX</src>
          <src nr="4" group="gen" type="w" displayed="no">SP</src>
          <src nr="5" group="gen" type="w" displayed="no">BP</src>
          <src nr="6" group="gen" type="w" displayed="no">SI</src>
          <src nr="7" group="gen" type="w" displayed="no">DI</src>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>Push All General-Purpose Registers</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
          <mnem>PUSHA</mnem>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
          <src nr="1" group="gen" type="w" displayed="no">CX</src>
          <src nr="2" group="gen" type="w" displayed="no">DX</src>
          <src nr="3" group="gen" type="w" displayed="no">BX</src>
          <src nr="4" group="gen" type="w" displayed="no">SP</src>
          <src nr="5" group="gen" type="w" displayed="no">BP</src>
          <src nr="6" group="gen" type="w" displayed="no">SI</src>
          <src nr="7" group="gen" type="w" displayed="no">DI</src>
	</syntax>
	<syntax>
          <mnem>PUSHAD</mnem>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
          <src nr="1" group="gen" type="d" displayed="no">ECX</src>
          <src nr="2" group="gen" type="d" displayed="no">EDX</src>
          <src nr="3" group="gen" type="d" displayed="no">EBX</src>
          <src nr="4" group="gen" type="d" displayed="no">ESP</src>
          <src nr="5" group="gen" type="d" displayed="no">EBP</src>
          <src nr="6" group="gen" type="d" displayed="no">ESI</src>
          <src nr="7" group="gen" type="d" displayed="no">EDI</src>
	</syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>Push All General-Purpose Registers</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="61">
      <entry>
        <proc_start>01</proc_start>
	<syntax>
          <mnem>POPA</mnem>
          <dst nr="7" group="gen" type="w" displayed="no">DI</dst>
          <dst nr="6" group="gen" type="w" displayed="no">SI</dst>
          <dst nr="5" group="gen" type="w" displayed="no">BP</dst>
          <dst nr="3" group="gen" type="w" displayed="no">BX</dst>
          <dst nr="2" group="gen" type="w" displayed="no">DX</dst>
          <dst nr="1" group="gen" type="w" displayed="no">CX</dst>
          <dst nr="0" group="gen" type="w" displayed="no">AX</dst>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>Pop All General-Purpose Registers</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
          <mnem>POPA</mnem>
          <dst nr="7" group="gen" type="w" displayed="no">DI</dst>
          <dst nr="6" group="gen" type="w" displayed="no">SI</dst>
          <dst nr="5" group="gen" type="w" displayed="no">BP</dst>
          <dst nr="3" group="gen" type="w" displayed="no">BX</dst>
          <dst nr="2" group="gen" type="w" displayed="no">DX</dst>
          <dst nr="1" group="gen" type="w" displayed="no">CX</dst>
          <dst nr="0" group="gen" type="w" displayed="no">AX</dst>
	</syntax>
	<syntax>
          <mnem>POPAD</mnem>
          <dst nr="7" group="gen" type="d" displayed="no">EDI</dst>
          <dst nr="6" group="gen" type="d" displayed="no">ESI</dst>
          <dst nr="5" group="gen" type="d" displayed="no">EBP</dst>
          <dst nr="3" group="gen" type="d" displayed="no">EBX</dst>
          <dst nr="2" group="gen" type="d" displayed="no">EDX</dst>
          <dst nr="1" group="gen" type="d" displayed="no">ECX</dst>
          <dst nr="0" group="gen" type="d" displayed="no">EAX</dst>
	</syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>Pop All General-Purpose Registers</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="62">
      <!--<entry direction="1" r="yes" mod="mem" ring="f">-->
      <entry direction="1" r="yes" ring="f">
        <proc_start>01</proc_start>
	<syntax>
          <mnem>BOUND</mnem>
          <src><a>G</a><t>v</t></src>
          <src><a>M</a><t>a</t></src>
          <src type="v" address="F" displayed="no">eFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
        <modif_f cond="yes">i</modif_f>
        <def_f cond="yes">i</def_f>
        <f_vals>i</f_vals>
	<note>Check Array Index Against Bounds</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="63">
      <entry r="yes">
	<proc_start>02</proc_start>
	<syntax><mnem>ARPL</mnem><src><a>E</a><t>w</t></src><src><a>G</a><t>w</t></src></syntax>
	<grp1>system</grp1>
	<modif_f>z</modif_f><def_f>z</def_f>
	<note>Adjust RPL Field of Segment Selector</note>
      </entry>
      <entry direction="1" r="yes" mode="e">
	<proc_start>10</proc_start>
	<syntax>
          <mnem>MOVSXD</mnem>
          <dst depend="no"><a>G</a><t>dqp</t></dst>
          <!--<src><a>E</a><t>ds</t></src> 1.01 fix-->
          <src><a>E</a><t>d</t></src>
        </syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Move with Sign-Extension</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="64">
      <entry>
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>FS</mnem>
	  <src nr="4" group="seg" type="w" displayed="no">FS</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>FS segment override prefix</note>
      </entry>
      <entry attr="undef">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(used only with Jcc instructions)</note>
      </entry>
      <entry doc="u" doc1632_ref="gen_note_opcd_ALTER_64" particular="yes">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem sug="yes">ALTER</mnem>
	</syntax>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>Alternating branch prefix (used only with Jcc instructions)</note>
      </entry>
      <entry attr="undef" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(branch hint prefixes have no effect in 64-bit mode)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="65">
      <entry>
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>GS</mnem>
	  <src nr="5" group="seg" type="w" displayed="no">GS</src>
	</syntax>
	<grp1>prefix</grp1><grp2>segreg</grp2>
	<note>GS segment override prefix</note>
      </entry>
      <entry attr="undef">
	<proc_start>10</proc_start>
	<syntax/>
	<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<note>(used only with Jcc instructions)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="66">
      <entry>
	<syntax/>
	<grp1>prefix</grp1>
	<note>Operand-size override prefix</note>
      </entry>
      <entry doc="m">
	<proc_start>10</proc_start>
	<syntax/>
	<instr_ext>sse2</instr_ext>
	<grp1>prefix</grp1>
	<note>Precision-size override prefix</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="67">
      <entry>
	<syntax/>
	<grp1>prefix</grp1>
	<note>Address-size override prefix</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="68">
      <entry>
        <proc_start>01</proc_start>
        <syntax><mnem>PUSH</mnem><src><a>I</a><t>vs</t></src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="69">
      <entry>
        <proc_start>01</proc_start>
        <syntax>
          <mnem>IMUL</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src><src><a>I</a><t>vds</t></src>
        </syntax>  
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oc</def_f><undef_f>szap</undef_f>
        <note>Signed Multiply</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6A">
      <entry sign-ext="1">
        <proc_start>01</proc_start>
        <syntax><mnem>PUSH</mnem><src><a>I</a><t>bss</t></src></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Push Word, Doubleword or Quadword Onto the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6B">
      <entry sign-ext="1">
        <proc_start>01</proc_start>
        <syntax>
          <mnem>IMUL</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src><src><a>I</a><t>bs</t></src>
        </syntax>  
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oc</def_f><undef_f>szap</undef_f>
        <note>Signed Multiply</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6C">
      <entry op_size="0" ring="f" ring_ref="rflags_iopl">
	<proc_start>01</proc_start>
	<syntax>
	  <mnem>INS</mnem>
	  <dst depend="no"><a>Y</a><t>b</t></dst>
	  <src nr="2" group="gen" type="w">DX</src>
	</syntax>
	<syntax>
	  <mnem>INSB</mnem>
	  <dst displayed="no" depend="no"><a>Y</a><t>b</t></dst>
	  <src nr="2" group="gen" type="w" displayed="no">DX</src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Input from Port to String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6D">
      <entry op_size="1" ring="f" ring_ref="rflags_iopl">
	<proc_start>01</proc_start>
	<syntax>
	  <mnem>INS</mnem>
	  <dst depend="no"><a>Y</a><t>w</t></dst>
	  <src nr="2" group="gen" type="w">DX</src>
	</syntax>
	<syntax>
	  <mnem>INSW</mnem>
	  <dst displayed="no" depend="no"><a>Y</a><t>w</t></dst>
	  <src nr="2" group="gen" type="w" displayed="no">DX</src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Input from Port to String</note>
      </entry>
      <entry op_size="1" ring="f" ring_ref="rflags_iopl">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>INS</mnem>
	  <dst depend="no"><a>Y</a><t>v</t></dst>
	  <src nr="2" group="gen" type="w">DX</src>
	</syntax>
	<syntax>
	  <mnem>INSD</mnem>
	  <dst displayed="no" depend="no"><a>Y</a><t>d</t></dst>
	  <src nr="2" group="gen" type="w" displayed="no">DX</src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Input from Port to String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6E">
      <entry op_size="0" ring="f" ring_ref="rflags_iopl">
	<proc_start>01</proc_start>
	<syntax>
	  <mnem>OUTS</mnem>
	  <dst nr="2" group="gen" type="w" depend="no">DX</dst>
	  <src><a>X</a><t>b</t></src>
	</syntax>
	<syntax>
	  <mnem>OUTSB</mnem>
	  <dst nr="2" group="gen" type="w" displayed="no" depend="no">DX</dst>
	  <src displayed="no"><a>X</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Output String to Port</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="6F">
      <entry op_size="1" ring="f" ring_ref="rflags_iopl">
	<proc_start>01</proc_start>
	<syntax>
	  <mnem>OUTS</mnem>
	  <dst nr="2" group="gen" type="w" depend="no">DX</dst>
	  <src><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>OUTSW</mnem>
	  <dst nr="2" group="gen" type="w" displayed="no" depend="no">DX</dst>
	  <src displayed="no"><a>X</a><t>w</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Output String to Port</note>
      </entry>
      <entry op_size="1" ring="f" ring_ref="rflags_iopl">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>OUTS</mnem>
	  <dst nr="2" group="gen" type="w" depend="no">DX</dst>
	  <src><a>X</a><t>v</t></src>
	</syntax>
	<syntax>
	  <mnem>OUTSD</mnem>
	  <dst nr="2" group="gen" type="w" displayed="no" depend="no">DX</dst>
	  <src displayed="no"><a>X</a><t>d</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>inout</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Output String to Port</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="70">
      <entry tttn="0000">
	<syntax><mnem>JO</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>o</test_f>
	<note>Jump short if overflow (OF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="71">
      <entry tttn="0001">
	<syntax><mnem>JNO</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>o</test_f>
	<note>Jump short if not overflow (OF=0)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="72">
      <entry tttn="0010">
	<syntax><mnem>JB</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNAE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JC</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>c</test_f>
	<note>Jump short if below/not above or equal/carry (CF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="73">
      <entry tttn="0011">
	<syntax><mnem>JNB</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JAE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNC</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>c</test_f>
	<note>Jump short if not below/above or equal/not carry (CF=0)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="74">
      <entry tttn="0100">
	<syntax><mnem>JZ</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>z</test_f>
	<note>Jump short if zero/equal (ZF=0)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="75">
      <entry tttn="0101">
	<syntax><mnem>JNZ</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>z</test_f>
	<note>Jump short if not zero/not equal (ZF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="76">
      <entry tttn="0110">
	<syntax><mnem>JBE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNA</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>cz</test_f>
	<note>Jump short if below or equal/not above (CF=1 AND ZF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="77">
      <entry tttn="0111">
	<syntax><mnem>JNBE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JA</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>cz</test_f>
	<note>Jump short if not below or equal/above (CF=0 AND ZF=0)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="78">
      <entry tttn="1000">
	<syntax><mnem>JS</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>s</test_f>
	<note>Jump short if sign (SF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="79">
      <entry tttn="1001">
	<syntax><mnem>JNS</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>s</test_f>
	<note>Jump short if not sign (SF=0)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7A">
      <entry tttn="1010">
	<syntax><mnem>JP</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JPE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>p</test_f>
	<note>Jump short if parity/parity even (PF=1)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7B">
      <entry tttn="1011">
	<syntax><mnem>JNP</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JPO</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>p</test_f>
	<note>Jump short if not parity/parity odd</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7C">
      <entry tttn="1100">
	<syntax><mnem>JL</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNGE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>os</test_f>
	<note>Jump short if less/not greater (SF!=OF)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7D">
      <entry tttn="1101">
	<syntax><mnem>JNL</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JGE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>os</test_f>
	<note>Jump short if not less/greater or equal (SF=OF)</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7E">
      <entry tttn="1110">
	<syntax><mnem>JLE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JNG</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>osz</test_f>
	<note>Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="7F">
      <entry tttn="1111">
	<syntax><mnem>JNLE</mnem><src><a>J</a><t>bs</t></src></syntax>
	<syntax><mnem>JG</mnem><src><a>J</a><t>bs</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2><grp3>cond</grp3>
	<test_f>osz</test_f>
	<note>Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="80">
      <entry op_size="0" lock="yes">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ADD</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>1</opcd_ext>
        <syntax><mnem>OR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>ADC</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>SBB</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>4</opcd_ext>
        <syntax><mnem>AND</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SUB</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
      <entry op_size="0" lock="yes">
	<opcd_ext>6</opcd_ext>
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>CMP</mnem><src><a>E</a><t>b</t></src><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="81">
      <entry op_size="1" lock="yes">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ADD</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>1</opcd_ext>
        <syntax><mnem>OR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>ADC</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>SBB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>4</opcd_ext>
        <syntax><mnem>AND</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SUB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
      <entry op_size="1" lock="yes">
	<opcd_ext>6</opcd_ext>
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>CMP</mnem><src><a>E</a><t>vqp</t></src><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="82">
      <entry op_size="0" alias="80_0" lock="yes">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ADD</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
      <entry op_size="0" alias="80_1" lock="yes">
	<opcd_ext>1</opcd_ext>
        <syntax><mnem>OR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
      <entry op_size="0" alias="80_2" lock="yes">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>ADC</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
      <entry op_size="0" alias="80_3" lock="yes">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>SBB</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
      <entry op_size="0" alias="80_4" lock="yes">
	<opcd_ext>4</opcd_ext>
        <syntax><mnem>AND</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
      <entry op_size="0" alias="80_5" lock="yes">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SUB</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
      <entry op_size="0" alias="80_6" lock="yes">
	<opcd_ext>6</opcd_ext>
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
      <entry op_size="0" alias="80_7">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>CMP</mnem><src><a>E</a><t>b</t></src><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="83">
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ADD</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>1</opcd_ext>
	<proc_start>03</proc_start>
        <syntax><mnem>OR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Inclusive OR</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>ADC</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Add with Carry</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>SBB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Integer Subtraction with Borrow</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>4</opcd_ext>
	<proc_start>03</proc_start>
        <syntax><mnem>AND</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical AND</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SUB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Subtract</note>
      </entry>
      <entry sign-ext="1" op_size="1" lock="yes">
	<opcd_ext>6</opcd_ext>
	<proc_start>03</proc_start>
        <syntax><mnem>XOR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Exclusive OR</note>
      </entry>
      <entry sign-ext="1" op_size="1">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>CMP</mnem><src><a>E</a><t>vqp</t></src><src><a>I</a><t>bs</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszapc</def_f>
        <note>Compare Two Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="84">
      <entry direction="0" op_size="0" r="yes">
	<syntax><mnem>TEST</mnem><src><a>E</a><t>b</t></src><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Compare</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="85">
      <entry direction="0" op_size="1" r="yes">
	<syntax><mnem>TEST</mnem><src><a>E</a><t>vqp</t></src><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Compare</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="86">
      <entry direction="1" op_size="0" r="yes" lock="yes">
	<syntax><mnem>XCHG</mnem><dst><a>G</a><t>b</t></dst><dst><a>E</a><t>b</t></dst></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Exchange Register/Memory with Register</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="87">
      <entry direction="1" op_size="1" r="yes" lock="yes">
	<syntax><mnem>XCHG</mnem><dst><a>G</a><t>vqp</t></dst><dst><a>E</a><t>vqp</t></dst></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Exchange Register/Memory with Register</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="88">
      <entry direction="0" op_size="0" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="89">
      <entry direction="0" op_size="1" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8A">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8B">
      <entry direction="1" op_size="0" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8C">
      <entry direction="0" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>E</a><t>vqp</t></dst><src><a>S</a><t>w</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8D">
      <!--<entry r="yes" mod="mem">-->
      <entry r="yes">
        <syntax><mnem>LEA</mnem><dst><a>G</a><t>vqp</t></dst><src depend="no"><a>M</a></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Load Effective Address</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8E">
      <entry direction="1" r="yes">
        <syntax><mnem>MOV</mnem><dst><a>S</a><t>w</t></dst><src><a>E</a><t>vqp</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="8F">
      <entry op_size="1">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>POP</mnem><dst><a>E</a><t>v</t></dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
      <entry op_size="1" mode="e">
	<opcd_ext>0</opcd_ext>
	<proc_start>10</proc_start>
	<syntax><mnem>POP</mnem><dst><a>E</a><t>vq</t></dst></syntax>
        <grp1>gen</grp1><grp2>stack</grp2>
        <note>Pop a Value from the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="90">
      <entry attr="acc">
	<syntax>
	  <mnem>XCHG</mnem>
	  <dst><a>Z</a><t>vqp</t></dst>
	  <dst nr="0" group="gen" type="vqp">rAX</dst>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
	<note>Exchange Register/Memory with Register</note>
      </entry>
      <entry>
	<syntax><mnem>NOP</mnem></syntax>
	<grp1>gen</grp1><grp2>control</grp2>
	<note>No Operation</note>
      </entry>
      <entry attr="nop" doc_ref="gen_note_plain_F390" particular="yes">
	<pref>F3</pref>
	<syntax/>
	<grp1>gen</grp1><grp2>control</grp2>
	<note>No Operation</note>
      </entry>
      <entry>
	<pref>F3</pref>
	<proc_start>10</proc_start>
	<syntax><mnem>PAUSE</mnem></syntax>
	<instr_ext>sse2</instr_ext>
	<grp1>cachect</grp1>
	<note>Spin Loop Hint</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="98">
      <entry>
	<syntax>
          <mnem>CBW</mnem>
          <dst nr="4" group="gen" type="b" displayed="no" depend="no">AH</dst>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
        </syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert Byte to Word</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>CWDE</mnem>
          <dst nr="0" group="gen" type="d" displayed="no">EAX</dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert Word to Doubleword</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax>
          <mnem>CBW</mnem> <!-- duplicated -->
          <dst nr="4" group="gen" type="b" displayed="no" depend="no">AH</dst>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
        </syntax>
	<syntax>
	  <mnem>CWDE</mnem> <!-- duplicated -->
          <dst nr="0" group="gen" type="d" displayed="no">EAX</dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<syntax>
	  <mnem>CDQE</mnem>
          <dst nr="0" group="gen" type="qp" displayed="no">RAX</dst>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert</note>
      </entry>
    </pri_opcd>

<!-- 99 -->

    <pri_opcd value="99">
      <entry>
	<syntax>
          <mnem>CWD</mnem>
          <dst nr="2" group="gen" type="w" displayed="no" depend="no">DX</dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
        </syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert Word to Doubleword</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>CDQ</mnem>
          <dst nr="2" group="gen" type="d" displayed="no" depend="no">EDX</dst>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert Doubleword to Quadword</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax>
          <mnem>CWD</mnem> <!-- duplicated -->
          <dst nr="2" group="gen" type="w" displayed="no" depend="no">DX</dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
        </syntax>
	<syntax>
	  <mnem>CDQ</mnem> <!-- duplicated -->
          <dst nr="2" group="gen" type="d" displayed="no" depend="no">EDX</dst>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<syntax>
	  <mnem>CQO</mnem>
          <dst nr="2" group="gen" type="qp" displayed="no">RDX</dst>
          <src nr="0" group="gen" type="qp" displayed="no">RAX</src>
	</syntax>
	<grp1>gen</grp1><grp2>conver</grp2>
	<note>Convert</note>
      </entry>
    </pri_opcd>

<!-- 9A -->

    <pri_opcd value="9A">
      <entry>
	<syntax><mnem>CALLF</mnem><src><a>A</a><t>p</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2>
                        <grp2>stack</grp2>
	<note>Call Procedure</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

<!-- 9B --> <!-- both instruction and prefix -->

    <pri_opcd value="9B">
      <entry>
	<syntax><mnem>FWAIT</mnem></syntax>
	<syntax><mnem>WAIT</mnem></syntax>
	<grp1>x87fpu</grp1><grp2>control</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<undef_f_fpu>0123</undef_f_fpu>
	<note>Check pending unmasked floating-point exceptions</note>
      </entry>
      <entry>
	<syntax/>
	<grp1>prefix</grp1><grp2>x87fpu</grp2><grp3>control</grp3>
	<modif_f_fpu>0123</modif_f_fpu>
	<undef_f_fpu>0123</undef_f_fpu>
	<note>Wait Prefix</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="9C">
      <entry>
	<syntax>
          <mnem>PUSHF</mnem>
          <src type="w" address="F" displayed="no">Flags</src>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<test_f>odiszapc</test_f>
	<note>Push FLAGS Register onto the Stack</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
          <mnem>PUSHF</mnem>
          <src type="w" address="F" displayed="no">Flags</src>
        </syntax>
	<syntax>
          <mnem>PUSHFD</mnem>
          <src type="d" address="F" displayed="no">EFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<test_f>odiszapc</test_f>
	<note>Push eFLAGS Register onto the Stack</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax>
          <mnem>PUSHF</mnem>
          <src type="w" address="F" displayed="no">Flags</src>
        </syntax>
	<syntax>
          <mnem>PUSHFQ</mnem>
          <src type="q" address="F" displayed="no">RFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<test_f>odiszapc</test_f>
	<note>Push rFLAGS Register onto the Stack</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="9D">
      <entry>
	<syntax>
          <mnem>POPF</mnem>
          <dst type="w" address="F" displayed="no" depend="no">Flags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Pop Stack into FLAGS Register</note>
      </entry>
      <entry>
	<proc_start>03</proc_start>
	<syntax>
          <mnem>POPF</mnem>
          <dst type="w" address="F" displayed="no" depend="no">Flags</dst>
        </syntax>
	<syntax>
          <mnem>POPFD</mnem>
          <dst type="d" address="F" displayed="no" depend="no">EFlags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Pop Stack into eFLAGS Register</note>
      </entry>
      <entry mode="e">
	<proc_start>10</proc_start>
	<syntax>
          <mnem>POPF</mnem>
          <dst type="w" address="F" displayed="no" depend="no">Flags</dst>
        </syntax>
	<syntax>
          <mnem>POPFQ</mnem>
          <dst type="q" address="F" displayed="no" depend="no">RFlags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	                <grp2>flgctrl</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Pop Stack into rFLAGS Register</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="9E">
      <entry doc64_ref="gen_note_SAHF_9E_LAHF_9F">
	<syntax>
          <mnem>SAHF</mnem>
	  <src nr="4" group="gen" type="b" displayed="no">AH</src>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>flgctrl</grp2>
	<modif_f>szapc</modif_f><def_f>szapc</def_f>
	<note>Store AH into Flags</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="9F">
      <entry doc64_ref="gen_note_SAHF_9E_LAHF_9F">
	<syntax>
          <mnem>LAHF</mnem>
	  <dst nr="4" group="gen" type="b" displayed="no" depend="no">AH</dst>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>flgctrl</grp2>
	<test_f>szapc</test_f>
	<note>Load Status Flags into AH Register</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A0">
      <entry op_size="0">
	<syntax>
	  <mnem>MOV</mnem>
	  <dst nr="0" group="gen" type="b" depend="no">AL</dst>
	  <src><a>O</a><t>b</t></src>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A1">
      <entry op_size="1">
	<syntax>
	  <mnem>MOV</mnem>
	  <dst nr="0" group="gen" type="vqp" depend="no">rAX</dst>
	  <src><a>O</a><t>vqp</t></src>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A2">
      <entry op_size="0">
	<syntax>
	  <mnem>MOV</mnem>
	  <dst depend="no"><a>O</a><t>b</t></dst>
	  <src nr="0" group="gen" type="b">AL</src>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A3">
      <entry op_size="1">
	<syntax>
	  <mnem>MOV</mnem>
	  <dst depend="no"><a>O</a><t>vqp</t></dst>
	  <src nr="0" group="gen" type="vqp">rAX</src>
	</syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A4">
      <entry op_size="0">
	<syntax>
	  <mnem>MOVS</mnem>
          <dst depend="no"><a>Y</a><t>b</t></dst>
          <src><a>X</a><t>b</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSB</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>b</t></dst>
          <src displayed="no"><a>X</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Move Data from String to String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A5">
      <entry op_size="1">
	<syntax>
	  <mnem>MOVS</mnem>
          <dst depend="no"><a>Y</a><t>w</t></dst>
          <src><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSW</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>w</t></dst>
          <src displayed="no"><a>X</a><t>w</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Move Data from String to String</note>
      </entry>
      <entry op_size="1">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>MOVS</mnem>
          <dst depend="no"><a>Y</a><t>v</t></dst>
          <src><a>X</a><t>v</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSD</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>d</t></dst>
          <src displayed="no"><a>X</a><t>d</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Move Data from String to String</note>
      </entry>
      <entry op_size="1" mode="e">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem>MOVS</mnem>
          <dst depend="no"><a>Y</a><t>vqp</t></dst>
          <src><a>X</a><t>vqp</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSW</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>w</t></dst>
          <src displayed="no"><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSD</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>d</t></dst>
          <src displayed="no"><a>X</a><t>d</t></src>
	</syntax>
	<syntax>
	  <mnem>MOVSQ</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>qp</t></dst>
          <src displayed="no"><a>X</a><t>qp</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Move Data from String to String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A6">
      <entry op_size="0">
	<syntax>
	  <mnem>CMPS</mnem>
          <src><a>Y</a><t>b</t></src>
          <src><a>X</a><t>b</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSB</mnem>
          <src displayed="no"><a>Y</a><t>b</t></src>
          <src displayed="no"><a>X</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Compare String Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A7">
      <entry op_size="1">
	<syntax>
	  <mnem>CMPS</mnem>
          <src><a>Y</a><t>w</t></src>
          <src><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSW</mnem>
          <src displayed="no"><a>Y</a><t>w</t></src>
          <src displayed="no"><a>X</a><t>w</t></src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Compare String Operands</note>
      </entry>
      <entry op_size="1">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>CMPS</mnem>
          <src><a>Y</a><t>v</t></src>
          <src><a>X</a><t>v</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSD</mnem>
          <src displayed="no"><a>Y</a><t>d</t></src>
          <src displayed="no"><a>X</a><t>d</t></src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Compare String Operands</note>
      </entry>
      <entry op_size="1" mode="e">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem>CMPS</mnem>
          <src><a>Y</a><t>vqp</t></src>
          <src><a>X</a><t>vqp</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSW</mnem>
          <src displayed="no"><a>Y</a><t>w</t></src>
          <src displayed="no"><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSD</mnem>
          <src displayed="no"><a>Y</a><t>d</t></src>
          <src displayed="no"><a>X</a><t>d</t></src>
	</syntax>
	<syntax>
	  <mnem>CMPSQ</mnem>
          <src displayed="no"><a>Y</a><t>qp</t></src>
          <src displayed="no"><a>X</a><t>qp</t></src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Compare String Operands</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A8">
      <entry op_size="0" attr="acc">
        <syntax><mnem>TEST</mnem><src nr="0" group="gen" type="b">AL</src><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Compare</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="A9">
      <entry op_size="1" attr="acc">
        <syntax><mnem>TEST</mnem><src nr="0" group="gen" type="vqp">rAX</src><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>logical</grp2>
        <modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>
        <note>Logical Compare</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AA">
      <entry op_size="0">
	<syntax>
	  <mnem>STOS</mnem>
          <dst depend="no"><a>Y</a><t>b</t></dst>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
	</syntax>
	<syntax>
	  <mnem>STOSB</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>b</t></dst>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Store String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AB">
      <entry op_size="1">
	<syntax>
	  <mnem>STOS</mnem>
          <dst depend="no"><a>Y</a><t>w</t></dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<syntax>
	  <mnem>STOSW</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>w</t></dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Store String</note>
      </entry>
      <entry op_size="1">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>STOS</mnem>
          <dst depend="no"><a>Y</a><t>v</t></dst>
          <src nr="0" group="gen" type="v" displayed="no">eAX</src>
	</syntax>
	<syntax>
	  <mnem>STOSD</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>d</t></dst>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Store String</note>
      </entry>
      <entry op_size="1" mode="e">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem>STOS</mnem>
          <dst depend="no"><a>Y</a><t>vqp</t></dst>
          <src nr="0" group="gen" type="vqp" displayed="no">rAX</src>
	</syntax>
	<syntax>
	  <mnem>STOSW</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>w</t></dst>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<syntax>
	  <mnem>STOSD</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>d</t></dst>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<syntax>
	  <mnem>STOSQ</mnem>
          <dst displayed="no" depend="no"><a>Y</a><t>qp</t></dst>
          <src nr="0" group="gen" type="qp" displayed="no">RAX</src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Store String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AC">
      <entry op_size="0">
	<syntax>
	  <mnem>LODS</mnem>
          <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
          <src depend="no"><a>X</a><t>b</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSB</mnem>
          <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
          <src displayed="no" depend="no"><a>Y</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Load String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AD">
      <entry op_size="1">
	<syntax>
	  <mnem>LODS</mnem>
          <dst nr="0" group="gen" type="w" displayed="no">AX</dst>
          <src depend="no"><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSW</mnem>
          <dst nr="0" group="gen" type="w" displayed="no">AX</dst>
          <src displayed="no" depend="no"><a>X</a><t>w</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Load String</note>
      </entry>
      <entry op_size="1">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>LODS</mnem>
          <dst nr="0" group="gen" type="v" displayed="no">eAX</dst>
          <src depend="no"><a>X</a><t>v</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSD</mnem>
          <dst nr="0" group="gen" type="d" displayed="no">EAX</dst>
          <src displayed="no" depend="no"><a>X</a><t>d</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Load String</note>
      </entry>
      <entry op_size="1" mode="e">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem>LODS</mnem>
          <dst nr="0" group="gen" type="vqp" displayed="no">rAX</dst>
          <src depend="no"><a>X</a><t>vqp</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSW</mnem>
          <dst nr="0" group="gen" type="w" displayed="no">AX</dst>
          <src displayed="no" depend="no"><a>X</a><t>w</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSD</mnem>
          <dst nr="0" group="gen" type="d" displayed="no">EAX</dst>
          <src displayed="no" depend="no"><a>X</a><t>d</t></src>
	</syntax>
	<syntax>
	  <mnem>LODSQ</mnem>
          <dst nr="0" group="gen" type="qp" displayed="no">RAX</dst>
          <src displayed="no" depend="no"><a>X</a><t>qp</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
                        <grp2>string</grp2>
	<test_f>d</test_f>
	<note>Load String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AE">
      <entry op_size="0">
	<syntax>
	  <mnem>SCAS</mnem>
          <src><a>Y</a><t>b</t></src>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
	</syntax>
	<syntax>
	  <mnem>SCASB</mnem>
          <src displayed="no"><a>Y</a><t>b</t></src>
          <src nr="0" group="gen" type="b" displayed="no">AL</src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Scan String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="AF">
      <entry op_size="1">
	<syntax>
	  <mnem>SCAS</mnem>
          <src><a>Y</a><t>w</t></src>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<syntax>
	  <mnem>SCASW</mnem>
          <src displayed="no"><a>Y</a><t>w</t></src>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Scan String</note>
      </entry>
      <entry op_size="1">
	<proc_start>03</proc_start>
	<syntax>
	  <mnem>SCAS</mnem>
          <src><a>Y</a><t>v</t></src>
          <src nr="0" group="gen" type="v" displayed="no">eAX</src>
	</syntax>
	<syntax>
	  <mnem>SCASD</mnem>
          <src displayed="no"><a>Y</a><t>d</t></src>
          <src nr="0" group="gen" type="d" displayed="no">EAX</src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Scan String</note>
      </entry>
      <entry op_size="1" mode="e">
	<proc_start>10</proc_start>
	<syntax>
	  <mnem>SCAS</mnem>
          <src><a>Y</a><t>vqp</t></src>
          <src nr="0" group="gen" type="vqp" displayed="no">rAX</src>
	</syntax>
	<syntax>
	  <mnem>SCASW</mnem>
          <src displayed="no"><a>Y</a><t>w</t></src>
          <src nr="0" group="gen" type="w" displayed="no">AX</src>
	</syntax>
	<syntax>
	  <mnem>SCASD</mnem>
          <src displayed="no"><a>Y</a><t>d</t></src>
          <src nr="0" group="gen" type="v" displayed="no">EAX</src>
	</syntax>
	<syntax>
	  <mnem>SCASQ</mnem>
          <src displayed="no"><a>Y</a><t>qp</t></src>
          <src nr="0" group="gen" type="qp" displayed="no">RAX</src>
	</syntax>
	<grp1>gen</grp1>
        <grp2>arith</grp2><grp2>string</grp2>
        <grp3>binary</grp3>
	<test_f>d</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Scan String</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="B0">
      <entry>
	<syntax><mnem>MOV</mnem><dst depend="no"><a>Z</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
	<note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="B8">
      <entry>
	<syntax><mnem>MOV</mnem><dst depend="no"><a>Z</a><t>vqp</t></dst><src><a>I</a><t>vqp</t></src></syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
	<note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C0">
      <proc_start>01</proc_start>
      <entry op_size="0">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0" alias="C0_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oa</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C1">
      <proc_start>01</proc_start>
      <entry op_size="1">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0" alias="C1_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>b</t></src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oa</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C2">
      <entry>
	<syntax><mnem>RETN</mnem><src><a>I</a><t>w</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2>
	                <grp2>stack</grp2>
	<note>Return from procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C3">
      <entry>
	<syntax><mnem>RETN</mnem></syntax>
	<grp1>gen</grp1><grp2>branch</grp2>
	                <grp2>stack</grp2>
	<note>Return from procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C4">
      <!--<entry r="yes" mod="mem">-->
      <entry r="yes">
	<syntax>
	  <mnem>LES</mnem>
	  <dst nr="0" group="seg" type="w" displayed="no">ES</dst>
	  <dst><a>G</a><t>v</t></dst>
	  <src><a>M</a><t>p</t></src>
	</syntax>
	<grp1>gen</grp1>
	<grp2>datamov</grp2><grp2>segreg</grp2>
	<note>Load Far Pointer</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C5">
      <!--<entry r="yes" mod="mem">-->
      <entry r="yes">
	<syntax>
	  <mnem>LDS</mnem>
	  <dst nr="3" group="seg" type="w" displayed="no">DS</dst>
	  <dst><a>G</a><t>v</t></dst>
	  <src><a>M</a><t>p</t></src>
	</syntax>
	<grp1>gen</grp1>
	<grp2>datamov</grp2><grp2>segreg</grp2>
	<note>Load Far Pointer</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C6">
      <entry op_size="0">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>MOV</mnem><dst><a>E</a><t>b</t></dst><src><a>I</a><t>b</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C7">
      <entry op_size="1">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>MOV</mnem><dst><a>E</a><t>vqp</t></dst><src><a>I</a><t>vds</t></src></syntax>
        <grp1>gen</grp1><grp2>datamov</grp2>
        <note>Move</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C8">
      <entry>
	<proc_start>01</proc_start>
	<syntax>
          <mnem>ENTER</mnem>
	  <dst nr="5" group="gen" type="vs" displayed="no">rBP</dst>
          <src><a>I</a><t>w</t></src><src><a>I</a><t>b</t></src>
        </syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>Make Stack Frame for Procedure Parameters</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="C9">
      <entry>
	<proc_start>01</proc_start>
	<syntax>
	  <mnem>LEAVE</mnem>
	  <dst nr="5" group="gen" type="vs" displayed="no">rBP</dst>
	</syntax>
	<grp1>gen</grp1><grp2>stack</grp2>
	<note>High Level Procedure Exit</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CA">
      <entry ring="f">
	<syntax><mnem>RETF</mnem><src><a>I</a><t>w</t></src></syntax>
	<grp1>gen</grp1><grp2>branch</grp2>
	                <grp2>stack</grp2>
	<note>Return from procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CB">
      <entry ring="f">
	<syntax><mnem>RETF</mnem></syntax>
	<grp1>gen</grp1><grp2>branch</grp2>
	                <grp2>stack</grp2>
	<note>Return from procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CC">
      <entry ring="f">
	<syntax>
          <mnem>INT</mnem>
          <src address="I">3</src>
          <src type="v" address="F" displayed="no">eFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
<!--	<test_f>odiszapc</test_f>-->
        <modif_f>i</modif_f><def_f>i</def_f><f_vals>i</f_vals>
	<note>Call to Interrupt Procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CD">
      <entry ring="f">
	<syntax>
          <mnem>INT</mnem>
          <src><a>I</a><t>b</t></src>
          <src type="v" address="F" displayed="no">eFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
<!--	<test_f>odiszapc</test_f>-->
        <modif_f>i</modif_f><def_f>i</def_f><f_vals>i</f_vals>
	<note>Call to Interrupt Procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CE">
      <entry ring="f">
	<syntax>
          <mnem>INTO</mnem>
          <src type="v" address="F" displayed="no">eFlags</src>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
	<test_f>o</test_f>
        <modif_f cond="yes">i</modif_f>
        <def_f cond="yes">i</def_f>
        <f_vals>i</f_vals>
	<note>Call to Interrupt Procedure</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="CF">
      <entry ring="f">
	<syntax>
          <mnem>IRET</mnem>
          <dst type="w" address="F" displayed="no">Flags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Interrupt Return</note>
      </entry>
      <entry ring="f">
	<proc_start>03</proc_start>
	<syntax>
          <mnem>IRETD</mnem>
          <dst type="d" address="F" displayed="no">EFlags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Interrupt Return</note>
      </entry>
      <entry ring="f" mode="e">
	<syntax>   <!-- duplicated -->
          <mnem>IRET</mnem>
          <dst type="w" address="F" displayed="no">Flags</dst>
        </syntax>
	<syntax>   <!-- duplicated -->
          <mnem>IRETD</mnem>
          <dst type="d" address="F" displayed="no">EFlags</dst>
        </syntax>
	<syntax>
          <mnem>IRETQ</mnem>
          <dst type="qp" address="F" displayed="no">RFlags</dst>
        </syntax>
	<grp1>gen</grp1><grp2>break</grp2><grp2>stack</grp2>
	<modif_f>odiszapc</modif_f><def_f>odiszapc</def_f>
	<note>Interrupt Return</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D0">
      <entry op_size="0">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0" alias="D0_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>b</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D1">
      <entry op_size="1">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1" alias="D1_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>vqp</t></dst><src address="I">1</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D2">
      <entry op_size="0">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0" alias="D2_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="0">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>b</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oa</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D3">
      <entry op_size="1">
	<opcd_ext>0</opcd_ext>
	<syntax><mnem>ROL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>1</opcd_ext>
	<syntax><mnem>ROR</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>2</opcd_ext>
	<syntax><mnem>RCL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>3</opcd_ext>
	<syntax><mnem>RCR</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f><undef_f>o</undef_f>
	<note>Rotate</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>4</opcd_ext>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>5</opcd_ext>
	<syntax><mnem>SHR</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1" alias="D3_4" doc="u" doc_ref="gen_note_SAL_C0_4_C1_4_D0_4_D1_4">
	<opcd_ext>6</opcd_ext>
	<syntax><mnem>SAL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<syntax><mnem>SHL</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>oac</undef_f>
	<note>Shift</note>
      </entry>
      <entry op_size="1">
	<opcd_ext>7</opcd_ext>
	<syntax><mnem>SAR</mnem><dst><a>E</a><t>vqp</t></dst><src nr="1" group="gen" type="b">CL</src></syntax>
	<grp1>gen</grp1><grp2>shftrot</grp2>
	<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f>
	<note>Shift</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D4">
      <entry>
	<sec_opcd>0A</sec_opcd>
	<syntax>
	  <mnem>AAM</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no" depend="no">AH</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<modif_f>oszapc</modif_f><def_f>szp</def_f><undef_f>oac</undef_f>
	<note>ASCII Adjust AX After Multiply</note>
      </entry>
      <entry>
	<syntax>
	  <mnem sug="yes">AMX</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no" depend="no">AH</dst>
	  <src><a>I</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<modif_f>oszapc</modif_f><def_f>szp</def_f><undef_f>oac</undef_f>
	<note>Adjust AX After Multiply</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D5">
      <entry>
	<sec_opcd>0A</sec_opcd>
	<syntax>
	  <mnem>AAD</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no">AH</dst>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<modif_f>oszapc</modif_f><def_f>szp</def_f><undef_f>oac</undef_f>
	<note>ASCII Adjust AX Before Division</note>
      </entry>
      <entry>
	<syntax>
	  <mnem sug="yes">ADX</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <dst nr="4" group="gen" type="b" displayed="no">AH</dst>
	  <src><a>I</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>
	<modif_f>oszapc</modif_f><def_f>szp</def_f><undef_f>oac</undef_f>
	<note>Adjust AX Before Division</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D6">
      <entry attr="undef" doc_ref="gen_note_undefined_D6_F1" particular="yes">
	<proc_start>02</proc_start>
	<syntax/>
	<note>Undefined and Reserved; Does not Generate #UD</note>
      </entry>
      <entry doc="u" doc_ref="gen_note_u_SALC_D6">
	<proc_start>02</proc_start>
	<syntax>
	  <mnem>SALC</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no" depend="no">AL</dst>
	</syntax>
	<syntax>
	  <mnem>SETALC</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no" depend="no">AL</dst>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
	<test_f>c</test_f>
	<note>Set AL If Carry</note>
      </entry>
      <entry attr="invd" mode="e">
	<proc_start>10</proc_start>
	<syntax/>
	<note>Invalid Instruction in 64-Bit Mode</note>
      </entry>
    </pri_opcd>

    <pri_opcd value="D7">
      <entry>
	<syntax>
	  <mnem>XLAT</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <src><a>BB</a><t>b</t></src>
	</syntax>
	<syntax>
	  <mnem>XLATB</mnem>
	  <dst nr="0" group="gen" type="b" displayed="no">AL</dst>
	  <src displayed="no"><a>BB</a><t>b</t></src>
	</syntax>
	<grp1>gen</grp1><grp2>datamov</grp2>
	<note>Table Look-up Translation</note>
      </entry>
    </pri_opcd>

<!-- D8 -->

    <pri_opcd value="D8">
      <entry mem_format="00">
	<opcd_ext>0</opcd_ext>
	<syntax mod="mem">
	  <mnem>FADD</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FADD</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Add</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>1</opcd_ext>
	<syntax mod="mem">
	  <mnem>FMUL</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FMUL</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Multiply</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>2</opcd_ext>
	<syntax>
	  <mnem>FCOM</mnem>
          <src nr="0" group="x87fpu" displayed="no">ST</src>
          <src><a>ES</a><t>sr</t></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>compar</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Compare Real</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>2</opcd_ext>
	<sec_opcd>D1</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FCOM</mnem>
          <src nr="0" group="x87fpu" displayed="no">ST</src>
          <src nr="1" group="x87fpu" address="EST" displayed="no">ST1</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>compar</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Compare Real</note>
      </entry>

      <entry mem_format="00" fpop="once">
	<opcd_ext>3</opcd_ext>
	<syntax>
	  <mnem>FCOMP</mnem><src nr="0" group="x87fpu" displayed="no">ST</src><src><a>ES</a><t>sr</t></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>compar</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Compare Real and Pop</note>
      </entry>
      <entry fpop="once">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>3</opcd_ext>
	<sec_opcd>D9</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FCOMP</mnem>
          <src nr="0" group="x87fpu" displayed="no">ST</src>
          <src nr="1" group="x87fpu" address="EST" displayed="no">ST1</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>compar</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Compare Real and Pop</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>4</opcd_ext>
	<syntax mod="mem">
	  <mnem>FSUB</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FSUB</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Subtract</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>5</opcd_ext>
	<syntax mod="mem">
	  <mnem>FSUBR</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FSUBR</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Reverse Subtract</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>6</opcd_ext>
	<syntax mod="mem">
	  <mnem>FDIV</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FDIV</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Divide</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>7</opcd_ext>
	<syntax mod="mem">
	  <mnem>FDIVR</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>M</a><t>sr</t></src>
	</syntax>
	<syntax mod="nomem">
	  <mnem>FDIVR</mnem><dst nr="0" group="x87fpu">ST</dst><src><a>EST</a></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Reverse Divide</note>
      </entry>
    </pri_opcd>

<!-- D9 -->

    <pri_opcd value="D9">
      <entry mem_format="00" fpush="yes">
	<opcd_ext>0</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FLD</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><src><a>ES</a><t>sr</t></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Floating Point Value</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>1</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FXCH</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst><dst><a>EST</a></dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Exchange Register Contents</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>1</opcd_ext>
	<sec_opcd>C9</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FXCH</mnem>
          <dst nr="0" group="x87fpu" displayed="no">ST</dst>
          <dst nr="1" group="x87fpu" address="EST" displayed="no">ST1</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Exchange Register Contents</note>
      </entry>

      <entry mem_format="00">
	<opcd_ext>2</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FST</mnem><dst><a>M</a><t>sr</t></dst><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Store Floating Point Value</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>2</opcd_ext>
	<sec_opcd>D0</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FNOP</mnem>
	</syntax>
	<grp1>x87fpu</grp1><grp2>control</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<undef_f_fpu>0123</undef_f_fpu>
	<note>No Operation</note>
      </entry>

      <entry mem_format="00" mod="mem" fpop="once">
	<opcd_ext>3</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FSTP</mnem><dst><a>M</a><t>sr</t></dst><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Store Floating Point Value and Pop</note>
      </entry>
      <entry mod="nomem" part_alias="D9_3"
	doc_part_alias_ref="gen_note_FSTP1_D9_3_not_true_alias"
	doc_ref="gen_note_FSTP1_D9_3_FSTP8_DF_2_FSTP9_DF_3"
	fpop="once" particular="yes">
	<opcd_ext>3</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem sug="yes">FSTP1</mnem><dst><a>EST</a></dst><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Store Floating Point Value and Pop</note>
      </entry>
      <entry mod="nomem" part_alias="D9_3"
	doc_part_alias_ref="gen_note_FSTP1_D9_3_not_true_alias"
	doc="u" doc_ref="gen_note_x87_fpu_undoc_aliases" fpop="once"
	particular="yes">
	<opcd_ext>3</opcd_ext>
	<proc_start>03</proc_start>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem sug="yes">FSTP1</mnem><dst><a>EST</a></dst><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>datamov</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Store Floating Point Value and Pop</note>
      </entry>

      <entry>
	<opcd_ext>4</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FLDENV</mnem><src><a>M</a><t>e</t></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>control</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Load x87 FPU Environment</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>4</opcd_ext>
	<sec_opcd>E0</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FCHS</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Change Sign</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>4</opcd_ext>
	<sec_opcd>E1</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FABS</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>arith</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Absolute Value</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>4</opcd_ext>
	<sec_opcd>E4</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FTST</mnem><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>compar</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Test</note>
      </entry>
      <entry>   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>4</opcd_ext>
	<sec_opcd>E5</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FXAM</mnem><src nr="0" group="x87fpu" displayed="no">ST</src>
	</syntax>
	<grp1>x87fpu</grp1>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>0123</def_f_fpu>
	<note>Examine</note>
      </entry>

      <entry>
	<opcd_ext>5</opcd_ext>
	<!--<syntax mod="mem">-->
	<syntax>
	  <mnem>FLDCW</mnem><src><a>M</a><t>w</t></src>
	</syntax>
	<grp1>x87fpu</grp1><grp2>control</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<undef_f_fpu>0123</undef_f_fpu>
	<note>Load x87 FPU Control Word</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>E8</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLD1</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant +1.0</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>E9</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDL2T</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant log<sub>2</sub>10</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>EA</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDL2E</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant log<sub>2</sub>e</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>EB</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDPI</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant &#960;</note>   <!-- 960 is pi code -->
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>EC</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDLG2</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant log<sub>10</sub>2</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>ED</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDLN2</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</grp2>
	<modif_f_fpu>0123</modif_f_fpu>
	<def_f_fpu>1</def_f_fpu>
	<undef_f_fpu>023</undef_f_fpu>
	<note>Load Constant log<sub>e</sub>2</note>
      </entry>
      <entry fpush="yes">   <!-- @mod=nomem not needed, because sec_opcd must be matched -->
	<opcd_ext>5</opcd_ext>
	<sec_opcd>EE</sec_opcd>
	<!--<syntax mod="nomem">-->
	<syntax>
	  <mnem>FLDZ</mnem><dst nr="0" group="x87fpu" displayed="no">ST</dst>
	</syntax>
	<grp1>x87fpu</grp1><grp2>ldconst</