coder edition | X86 Opcode and Instruction Reference 1.01

one-byte opcodes index:

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF

two-byte opcodes (0F..) index:

00 01 02 03 05 06 07 08 09 0B 0D 10 11 12 13 14 15 16 17 18 1F 20 21 22 23 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 38 3A 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B9 BA BB BC BD BE BF C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE

description, notes

ADD

r/m8

o..szapc

Add

ADD

r/m16/32/64

r16/32/64

o..szapc

Add

ADD

r/m8

o..szapc

Add

ADD

r16/32/64

r/m16/32/64

o..szapc

Add

ADD

imm8

o..szapc

Add

ADD

rAX

imm16/32

o..szapc

Add

PUSH

Push Word, Doubleword or Quadword Onto the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

POP

Pop a Value from the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

r/m16/32/64

r16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

r16/32/64

r/m16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

rAX

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

PUSH

Push Word, Doubleword or Quadword Onto the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

02+

Two-byte Instructions

ADC

r/m8

.......c

o..szapc

Add with Carry

ADC

r/m16/32/64

r16/32/64

.......c

o..szapc

Add with Carry

ADC

r/m8

.......c

o..szapc

Add with Carry

ADC

r16/32/64

r/m16/32/64

.......c

o..szapc

Add with Carry

ADC

imm8

.......c

o..szapc

Add with Carry

ADC

rAX

imm16/32

.......c

o..szapc

Add with Carry

PUSH

Push Word, Doubleword or Quadword Onto the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

POP

Pop a Value from the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

SBB

r/m8

.......c

o..szapc

Integer Subtraction with Borrow

SBB

r/m16/32/64

r16/32/64

.......c

o..szapc

Integer Subtraction with Borrow

SBB

r/m8

.......c

o..szapc

Integer Subtraction with Borrow

SBB

r16/32/64

r/m16/32/64

.......c

o..szapc

Integer Subtraction with Borrow

SBB

imm8

.......c

o..szapc

Integer Subtraction with Borrow

SBB

rAX

imm16/32

.......c

o..szapc

Integer Subtraction with Borrow

PUSH

Push Word, Doubleword or Quadword Onto the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

POP

Pop a Value from the Stack

P4+

invalid

Invalid Instruction in 64-Bit Mode

AND

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

AND

r/m16/32/64

r16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

AND

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

AND

r16/32/64

r/m16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

AND

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

AND

rAX

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

ES segment override prefix

P4+

undefined

(use with any branch instruction is reserved)

P4+

null

Null Prefix in 64-bit Mode

DAA

.....a.c

o..szapc

...szapc

o.......

Decimal Adjust AL after Addition

P4+

invalid

Invalid Instruction in 64-Bit Mode

SUB

r/m8

o..szapc

Subtract

SUB

r/m16/32/64

r16/32/64

o..szapc

Subtract

SUB

r/m8

o..szapc

Subtract

SUB

r16/32/64

r/m16/32/64

o..szapc

Subtract

SUB

imm8

o..szapc

Subtract

SUB

rAX

imm16/32

o..szapc

Subtract

CS segment override prefix

P4+

NTAKEN

Branch not taken prefix (used only with Jcc instructions)

P4+

undefined

(branch hint prefixes have no effect in 64-bit mode)

P4+

null

Null Prefix in 64-bit Mode

DAS

.....a.c

o..szapc

...szapc

o.......

Decimal Adjust AL after Subtraction

P4+

invalid

Invalid Instruction in 64-Bit Mode

XOR

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

XOR

r/m16/32/64

r16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

XOR

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

XOR

r16/32/64

r/m16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

XOR

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

XOR

rAX

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

SS segment override prefix

P4+

undefined

(use with any branch instruction is reserved)

P4+

null

Null Prefix in 64-bit Mode

AAA

.....a..

o..szapc

.....a.c

o..sz.p.

ASCII Adjust After Addition

P4+

invalid

Invalid Instruction in 64-Bit Mode

CMP

r/m8

o..szapc

Compare Two Operands

CMP

r/m16/32/64

r16/32/64

o..szapc

Compare Two Operands

CMP

r/m8

o..szapc

Compare Two Operands

CMP

r16/32/64

r/m16/32/64

o..szapc

Compare Two Operands

CMP

imm8

o..szapc

Compare Two Operands

CMP

rAX

imm16/32

o..szapc

Compare Two Operands

DS segment override prefix

P4+

TAKEN

Branch taken prefix (used only with Jcc instructions)

P4+

undefined

(branch hint prefixes have no effect in 64-bit mode)

P4+

null

Null Prefix in 64-bit Mode

AAS

.....a..

o..szapc

.....a.c

o..sz.p.

ASCII Adjust AL After Subtraction

P4+

invalid

Invalid Instruction in 64-Bit Mode

40+r

INC

r16/32

o..szap.

Increment by 1

P4+

REX

Access to new 8-bit registers

P4+

REX.B

Extension of the r/m field, base field, or opcode reg field

P4+

REX.X

Extension of the SIB index field

P4+

REX.XB

REX.X and REX.B combination

P4+

REX.R

Extension of the ModR/M reg field

P4+

REX.RB

REX.R and REX.B combination

P4+

REX.RX

REX.R and REX.X combination

P4+

REX.RXB

REX.R, REX.X and REX.B combination

48+r

DEC

r16/32

o..szap.

Decrement by 1

P4+

REX.W

64 Bit Operand Size

P4+

REX.WB

REX.W and REX.B combination

P4+

REX.WX

REX.W and REX.X combination

P4+

REX.WXB

REX.W, REX.X and REX.B combination

P4+

REX.WR

REX.W and REX.R combination

P4+

REX.WRB

REX.W, REX.R and REX.B combination

P4+

REX.WRX

REX.W, REX.R and REX.X combination

P4+

REX.WRXB

REX.W, REX.R, REX.X and REX.B combination

50+r

PUSH

r16/32

Push Word, Doubleword or Quadword Onto the Stack

50+r

P4+

PUSH

r64/16

Push Word, Doubleword or Quadword Onto the Stack

58+r

POP

r16/32

Pop a Value from the Stack

58+r

P4+

POP

r64/16

Pop a Value from the Stack

01+

PUSHA

...

Push All General-Purpose Registers

03+

PUSHA

...

Push All General-Purpose Registers

PUSHAD

EAX

ECX

EDX

...

P4+

invalid

Invalid Instruction in 64-Bit Mode

01+

POPA

...

Pop All General-Purpose Registers

03+

POPA

...

Pop All General-Purpose Registers

POPAD

EDI

ESI

EBP

...

P4+

invalid

Invalid Instruction in 64-Bit Mode

01+

BOUND

r16/32

m16/32&16/32

eFlags

..i.....

Check Array Index Against Bounds

P4+

invalid

Invalid Instruction in 64-Bit Mode

02+

ARPL

r/m16

r16

....z...

Adjust RPL Field of Segment Selector

P4+

MOVSXD

r32/64

r/m32

Move with Sign-Extension

03+

FS segment override prefix

P4+

undefined

(used only with Jcc instructions)

P4+

U¹

ALTER

Alternating branch prefix (used only with Jcc instructions)

P4+

undefined

(branch hint prefixes have no effect in 64-bit mode)

03+

GS segment override prefix

P4+

undefined

(used only with Jcc instructions)

no mnemonic

Operand-size override prefix

P4+

no mnemonic

sse2

Precision-size override prefix

no mnemonic

Address-size override prefix

01+

PUSH

imm16/32

Push Word, Doubleword or Quadword Onto the Stack

01+

IMUL

r16/32/64

r/m16/32/64

imm16/32

o..szapc

o......c

...szap.

Signed Multiply

01+

PUSH

imm8

Push Word, Doubleword or Quadword Onto the Stack

01+

IMUL

r16/32/64

r/m16/32/64

imm8

o..szapc

o......c

...szap.

Signed Multiply

01+

f¹

INS

.d......

Input from Port to String

INSB

01+

f¹

INS

m16

.d......

Input from Port to String

INSW

m16

03+

f¹

INS

m16/32

.d......

Input from Port to String

INSD

m32

01+

f¹

OUTS

.d......

Output String to Port

OUTSB

01+

f¹

OUTS

m16

.d......

Output String to Port

OUTSW

m16

03+

f¹

OUTS

m16/32

.d......

Output String to Port

OUTSD

m32

rel8

o.......

Jump short if overflow (OF=1)

JNO

rel8

o.......

Jump short if not overflow (OF=0)

rel8

.......c

Jump short if below/not above or equal/carry (CF=1)

JNAE

rel8

JNB

rel8

.......c

Jump short if not below/above or equal/not carry (CF=0)

JAE

rel8

JNC

rel8

....z...

Jump short if zero/equal (ZF=0)

rel8

JNZ

rel8

....z...

Jump short if not zero/not equal (ZF=1)

JNE

rel8

JBE

rel8

....z..c

Jump short if below or equal/not above (CF=1 AND ZF=1)

JNA

rel8

JNBE

rel8

....z..c

Jump short if not below or equal/above (CF=0 AND ZF=0)

rel8

...s....

Jump short if sign (SF=1)

JNS

rel8

...s....

Jump short if not sign (SF=0)

rel8

......p.

Jump short if parity/parity even (PF=1)

JPE

rel8

JNP

rel8

......p.

Jump short if not parity/parity odd

JPO

rel8

o..s....

Jump short if less/not greater (SF!=OF)

JNGE

rel8

JNL

rel8

o..s....

Jump short if not less/greater or equal (SF=OF)

JGE

rel8

JLE

rel8

o..sz...

Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))

JNG

rel8

JNLE

rel8

o..sz...

Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))

rel8

ADD

r/m8

imm8

o..szapc

Add

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

ADC

r/m8

imm8

.......c

o..szapc

Add with Carry

SBB

r/m8

imm8

.......c

o..szapc

Integer Subtraction with Borrow

AND

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

SUB

r/m8

imm8

o..szapc

Subtract

XOR

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

CMP

r/m8

imm8

o..szapc

Compare Two Operands

ADD

r/m16/32/64

imm16/32

o..szapc

Add

r/m16/32/64

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

ADC

r/m16/32/64

imm16/32

.......c

o..szapc

Add with Carry

SBB

r/m16/32/64

imm16/32

.......c

o..szapc

Integer Subtraction with Borrow

AND

r/m16/32/64

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

SUB

r/m16/32/64

imm16/32

o..szapc

Subtract

XOR

r/m16/32/64

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

CMP

r/m16/32/64

imm16/32

o..szapc

Compare Two Operands

ADD

r/m8

imm8

o..szapc

Add

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

ADC

r/m8

imm8

.......c

o..szapc

Add with Carry

SBB

r/m8

imm8

.......c

o..szapc

Integer Subtraction with Borrow

AND

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

SUB

r/m8

imm8

o..szapc

Subtract

XOR

r/m8

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

CMP

r/m8

imm8

o..szapc

Compare Two Operands

P4+

invalid

Invalid Instruction in 64-Bit Mode

ADD

r/m16/32/64

imm8

o..szapc

Add

03+

r/m16/32/64

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Inclusive OR

ADC

r/m16/32/64

imm8

.......c

o..szapc

Add with Carry

SBB

r/m16/32/64

imm8

.......c

o..szapc

Integer Subtraction with Borrow

03+

AND

r/m16/32/64

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical AND

SUB

r/m16/32/64

imm8

o..szapc

Subtract

03+

XOR

r/m16/32/64

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Exclusive OR

CMP

r/m16/32/64

imm8

o..szapc

Compare Two Operands

TEST

r/m8

o..szapc

o..sz.pc

.....a..

o......c

Logical Compare

TEST

r/m16/32/64

r16/32/64

o..szapc

o..sz.pc

.....a..

o......c

Logical Compare

XCHG

r/m8

Exchange Register/Memory with Register

XCHG

r16/32/64

r/m16/32/64

Exchange Register/Memory with Register

MOV

r/m8

Move

MOV

r/m16/32/64

r16/32/64

Move

MOV

r/m8

Move

MOV

r16/32/64

r/m16/32/64

Move

MOV

r/m16/32/64

Sreg

Move

LEA

r16/32/64

Load Effective Address

MOV

Sreg

r/m16/32/64

Move

POP

r/m16/32

Pop a Value from the Stack

P4+

POP

r/m64/16

Pop a Value from the Stack

90+r

XCHG

r16/32/64

rAX

Exchange Register/Memory with Register

NOP

No Operation

D²

no mnemonic nop

No Operation

P4+

PAUSE

sse2

Spin Loop Hint

CBW

Convert Byte to Word

03+

CWDE

EAX

Convert Word to Doubleword

P4+

CBW

Convert

CWDE

EAX

CDQE

RAX

EAX

CWD

Convert Word to Doubleword

03+

CDQ

EDX

EAX

Convert Doubleword to Quadword

P4+

CWD

Convert

CDQ

EDX

EAX

CQO

RDX

RAX

CALLF

ptr16:16/32

Call Procedure

P4+

invalid

Invalid Instruction in 64-Bit Mode

FWAIT

0123

Check pending unmasked floating-point exceptions

WAIT

no mnemonic

0123

Wait Prefix

PUSHF

Flags

odiszapc

Push FLAGS Register onto the Stack

03+

PUSHF

Flags

odiszapc

Push eFLAGS Register onto the Stack

PUSHFD

EFlags

P4+

PUSHF

Flags

odiszapc

Push rFLAGS Register onto the Stack

PUSHFQ

RFlags

POPF

Flags

odiszapc

Pop Stack into FLAGS Register

03+

POPF

Flags

odiszapc

Pop Stack into eFLAGS Register

POPFD

EFlags

P4+

POPF

Flags

odiszapc

Pop Stack into rFLAGS Register

POPFQ

RFlags

D³

SAHF

...szapc

Store AH into Flags

D³

LAHF

...szapc

Load Status Flags into AH Register

MOV

moffs8

Move

MOV

rAX

moffs16/32/64

Move

MOV

moffs8

Move

MOV

moffs16/32/64

rAX

Move

MOVS

.d......

Move Data from String to String

MOVSB

MOVS

m16

m16

.d......

Move Data from String to String

MOVSW

m16

m16

03+

MOVS

m16/32

m16/32

.d......

Move Data from String to String

MOVSD

m32

m32

P4+

MOVS

m16/32/64

m16/32/64

.d......

Move Data from String to String

MOVSW

m16

m16

MOVSD

m32

m32

MOVSQ

m64

m64

CMPS

.d......

o..szapc

Compare String Operands

CMPSB

CMPS

m16

.d......

o..szapc

Compare String Operands

CMPSW

m16

03+

CMPS

m16/32

.d......

o..szapc

Compare String Operands

CMPSD

m32

P4+

CMPS

m16/32/64

.d......

o..szapc

Compare String Operands

CMPSW

m16

CMPSD

m32

CMPSQ

m64

TEST

imm8

o..szapc

o..sz.pc

.....a..

o......c

Logical Compare

TEST

rAX

imm16/32

o..szapc

o..sz.pc

.....a..

o......c

Logical Compare

STOS

.d......

Store String

STOSB

STOS

m16

.d......

Store String

STOSW

m16

03+

STOS

m16/32

eAX

.d......

Store String

STOSD

m32

EAX

P4+

STOS

m16/32/64

rAX

.d......

Store String

STOSW

m16

STOSD

m32

EAX

STOSQ

m64

RAX

LODS

.d......

Load String

LODSB

LODS

m16

.d......

Load String

LODSW

m16

03+

LODS

eAX

m16/32

.d......

Load String

LODSD

EAX

m32

P4+

LODS

rAX

m16/32/64

.d......

Load String

LODSW

m16

LODSD

EAX

m32

LODSQ

RAX

m64

SCAS

.d......

o..szapc

Scan String

SCASB

SCAS

m16

.d......

o..szapc

Scan String

SCASW

m16

03+

SCAS

m16/32

eAX

.d......

o..szapc

Scan String

SCASD

m32

EAX

P4+

SCAS

m16/32/64

rAX

.d......

o..szapc

Scan String

SCASW

m16

SCASD

m32

EAX

SCASQ

m64

RAX

B0+r

MOV

imm8

Move

B8+r

MOV

r16/32/64

imm16/32/64

Move

01+

ROL

r/m8

imm8

o..szapc

o.......

Rotate

01+

ROR

r/m8

imm8

o..szapc

o.......

Rotate

01+

RCL

r/m8

imm8

.......c

o..szapc

o.......

Rotate

01+

RCR

r/m8

imm8

.......c

o..szapc

o.......

Rotate

01+

SHL

r/m8

imm8

o..szapc

o..sz.pc

o....a.c

Shift

SAL

r/m8

imm8

01+

SHR

r/m8

imm8

o..szapc

o..sz.pc

o....a.c

Shift

01+

U⁴

SAL

r/m8

imm8

o..szapc

o..sz.pc

o....a.c

Shift

SHL

r/m8

imm8

01+

SAR

r/m8

imm8

o..szapc

o..sz.pc

o....a..

Shift

01+

ROL

r/m16/32/64

imm8

o..szapc

o.......

Rotate

01+

ROR

r/m16/32/64

imm8

o..szapc

o.......

Rotate

01+

RCL

r/m16/32/64

imm8

.......c

o..szapc

o.......

Rotate

01+

RCR

r/m16/32/64

imm8

.......c

o..szapc

o.......

Rotate

01+

SHL

r/m16/32/64

imm8

X86 Opcode and Instruction Reference Home

one-byte opcodes index:

two-byte opcodes (0F..) index: