X86 Opcode and Instruction Reference Home

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A B C D E F G H I J L M N O P R S T U V W X

mnemonic	op1	op2	op3	op4	iext	pf	0F	po	so	flds	o	proc	st	m	rl	x	grp1	grp2	grp3	tested f	modif f	def f	undef f	f values	description, notes
AAA	AL	AH						37									gen	arith	decimal	.....a..	o..szapc	.....a.c	o..sz.p.		ASCII Adjust After Addition
AAD	AL	AH						D5	0A								gen	arith	decimal		o..szapc	...sz.p.	o....a.c		ASCII Adjust AX Before Division
AAM	AL	AH						D4	0A								gen	arith	decimal		o..szapc	...sz.p.	o....a.c		ASCII Adjust AX After Multiply
AAS	AL	AH						3F									gen	arith	decimal	.....a..	o..szapc	.....a.c	o..sz.p.		ASCII Adjust AL After Subtraction
ADC	Eb	Gb						10		dw	r					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Evqp	Gvqp						11		dW	r					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Gb	Eb						12		Dw	r						gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Gvqp	Evqp						13		DW	r						gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	AL	Ib						14		w							gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	rAX	Ivds						15		W							gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Eb	Ib						80		w	2					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Evqp	Ivds						81		W	2					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC alias	Eb	Ib						82		w	2					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADC	Evqp	Ibs						83		SW	2					L	gen	arith	binary	.......c	o..szapc	o..szapc			Add with Carry
ADD	Eb	Gb						00		dw	r					L	gen	arith	binary		o..szapc	o..szapc			Add
ADD	Evqp	Gvqp						01		dW	r					L	gen	arith	binary		o..szapc	o..szapc			Add
ADD	Gb	Eb						02		Dw	r						gen	arith	binary		o..szapc	o..szapc			Add
ADD	Gvqp	Evqp						03		DW	r						gen	arith	binary		o..szapc	o..szapc			Add
ADD	AL	Ib						04		w							gen	arith	binary		o..szapc	o..szapc			Add
ADD	rAX	Ivds						05		W							gen	arith	binary		o..szapc	o..szapc			Add
ADD	Eb	Ib						80		w	0					L	gen	arith	binary		o..szapc	o..szapc			Add
ADD	Evqp	Ivds						81		W	0					L	gen	arith	binary		o..szapc	o..szapc			Add
ADD alias	Eb	Ib						82		w	0					L	gen	arith	binary		o..szapc	o..szapc			Add
ADD	Evqp	Ibs						83		SW	0					L	gen	arith	binary		o..szapc	o..szapc			Add
ADDPD	Vpd	Wpd			sse2	66	0F	58			r	P4+					pcksclr	arith							Add Packed Double-FP Values
ADDPS	Vps	Wps			sse1		0F	58			r	P3+					simdfp	arith							Add Packed Single-FP Values
ADDSD	Vsd	Wsd			sse2	F2	0F	58			r	P4+					pcksclr	arith							Add Scalar Double-FP Values
ADDSS	Vss	Wss			sse1	F3	0F	58			r	P3+					simdfp	arith							Add Scalar Single-FP Values
ADDSUBPD	Vpd	Wpd			sse3	66	0F	D0			r	P4++					simdfp	arith							Packed Double-FP Add/Subtract
ADDSUBPS	Vps	Wps			sse3	F2	0F	D0			r	P4++					simdfp	arith							Packed Single-FP Add/Subtract
ADX	AL	AH	Ib					D5									gen	arith	decimal		o..szapc	...sz.p.	o....a.c		Adjust AX Before Division
ALTER						64						P4+	U²				prefix	branch	cond						Alternating branch prefix (used only with Jcc instructions)
AMX	AL	AH	Ib					D4									gen	arith	decimal		o..szapc	...sz.p.	o....a.c		Adjust AX After Multiply
AND	Eb	Gb						20		dw	r					L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Evqp	Gvqp						21		dW	r					L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Gb	Eb						22		Dw	r						gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Gvqp	Evqp						23		DW	r						gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	AL	Ib						24		w							gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	rAX	Ivds						25		W							gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Eb	Ib						80		w	4					L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Evqp	Ivds						81		W	4					L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND alias	Eb	Ib						82		w	4					L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
AND	Evqp	Ibs						83		SW	4	03+				L	gen	logical			o..szapc	o..sz.pc	.....a..	o......c	Logical AND
ANDNPD	Vpd	Wpd			sse2	66	0F	55			r	P4+					pcksclr	logical							Bitwise Logical AND NOT of Packed Double-FP Values
ANDNPS	Vps	Wps			sse1		0F	55			r	P3+					simdfp	logical							Bitwise Logical AND NOT of Packed Single-FP Values
ANDPD	Vpd	Wpd			sse2	66	0F	54			r	P4+					pcksclr	logical							Bitwise Logical AND of Packed Double-FP Values
ANDPS	Vps	Wps			sse1		0F	54			r	P3+					simdfp	logical							Bitwise Logical AND of Packed Single-FP Values
ARPL	Ew	Gw						63			r	02+					system				....z...	....z...			Adjust RPL Field of Segment Selector
BOUND	Gv	Ma	e...					62		D	r	01+			f		gen	break stack			..i.....	..i.....		..i.....	Check Array Index Against Bounds
BSF	Gvqp	Evqp					0F	BC				03+	D²⁷				gen	bit			o..szapc	....z...	o..s.apc		Bit Scan Forward
BSR	Gvqp	Evqp					0F	BD				03+	D²⁷				gen	bit			o..szapc	....z...	o..s.apc		Bit Scan Reverse
BSWAP	Zvqp						0F	C8		+r		04+					gen	datamov							Byte Swap
BT	Evqp	Gvqp					0F	A3				03+					gen	bit			o..szapc	.......c	o..szap.		Bit Test
BT	Evqp	Ib					0F	BA			4	03+					gen	bit			o..szapc	.......c	o..szap.		Bit Test
BTC	Evqp	Ib					0F	BA			7	03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Complement
BTC	Evqp	Gvqp					0F	BB				03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Complement
BTR	Evqp	Gvqp					0F	B3				03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Reset
BTR	Evqp	Ib					0F	BA			6	03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Reset
BTS	Evqp	Gvqp					0F	AB				03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Set
BTS	Evqp	Ib					0F	BA			5	03+				L	gen	bit			o..szapc	.......c	o..szap.		Bit Test and Set
CALL	Jv							E8									gen	branch stack							Call Procedure
CALL	Jds							E8				P4+	D²⁹	E			gen	branch stack							Call Procedure
CALL	Ev							FF			2						gen	branch stack							Call Procedure
CALL	Eq							FF			2	P4+	D²⁹	E			gen	branch stack							Call Procedure
CALLF	Ap							9A									gen	branch stack							Call Procedure
CALLF	Mptp							FF			3		D¹⁶				gen	branch stack							Call Procedure
CBW	AH	AL						98									gen	conver							Convert Byte to Word
CBW	AH	AL						98				P4+		E			gen	conver							Convert
CWDE	*EAX*	AX
CDQE	*RAX*	EAX
CDQ	*EDX*	EAX						99				03+					gen	conver							Convert Doubleword to Quadword
CLC								F8									gen	flgctrl			.......c	.......c		.......c	Clear Carry Flag
CLD								FC									gen	flgctrl			.d......	.d......		.d......	Clear Direction Flag
CLFLUSH	Mb				sse2		0F	AE			7	P4+					cachect								Flush Cache Line
CLI								FA							f¹		gen	flgctrl			..i.....	..i.....		..i.....	Clear Interrupt Flag
CLTS	*CR0*						0F	06				02+			0										Clear Task-Switched Flag in CR0
CMC								F5									gen	flgctrl		.......c	.......c	.......c			Complement Carry Flag
CMOVB	Gvqp	Evqp					0F	42		ttTn	r	PP+					gen	datamov		.......c					Conditional Move - below/not above or equal/carry (CF=1)
CMOVNAE	Gvqp	Evqp
CMOVC	Gvqp	Evqp
CMOVBE	Gvqp	Evqp					0F	46		tTTn	r	PP+					gen	datamov		....z..c					Conditional Move - below or equal/not above (CF=1 AND ZF=1)
CMOVNA	Gvqp	Evqp					0F	46		tTTn	r	PP+					gen	datamov		....z..c					Conditional Move - below or equal/not above (CF=1 AND ZF=1)
CMOVL	Gvqp	Evqp					0F	4C		TTtn	r	PP+					gen	datamov		o..s....					Conditional Move - less/not greater (SF!=OF)
CMOVNGE	Gvqp	Evqp					0F	4C		TTtn	r	PP+					gen	datamov		o..s....					Conditional Move - less/not greater (SF!=OF)
CMOVLE	Gvqp	Evqp					0F	4E		TTTn	r	PP+					gen	datamov		o..sz...					Conditional Move - less or equal/not greater ((ZF=1) OR (SF!=OF))
CMOVNG	Gvqp	Evqp					0F	4E		TTTn	r	PP+					gen	datamov		o..sz...
CMOVNB	Gvqp	Evqp					0F	43		ttTN	r	PP+					gen	datamov		.......c					Conditional Move - not below/above or equal/not carry (CF=0)
CMOVAE	Gvqp	Evqp
CMOVNC	Gvqp	Evqp
CMOVNBE	Gvqp	Evqp					0F	47		tTTN	r	PP+					gen	datamov		....z..c					Conditional Move - not below or equal/above (CF=0 AND ZF=0)
CMOVA	Gvqp	Evqp					0F	47		tTTN	r	PP+					gen	datamov		....z..c					Conditional Move - not below or equal/above (CF=0 AND ZF=0)
CMOVNL	Gvqp	Evqp					0F	4D		TTtN	r	PP+					gen	datamov		o..s....					Conditional Move - not less/greater or equal (SF=OF)
CMOVGE	Gvqp	Evqp					0F	4D		TTtN	r	PP+					gen	datamov		o..s....					Conditional Move - not less/greater or equal (SF=OF)
CMOVNLE	Gvqp	Evqp					0F	4F		TTTN	r	PP+					gen	datamov		o..sz...					Conditional Move - not less nor equal/greater ((ZF=0) AND (SF=OF))
CMOVG	Gvqp	Evqp					0F	4F		TTTN	r	PP+					gen	datamov		o..sz...
CMOVNO	Gvqp	Evqp					0F	41		tttN	r	PP+					gen	datamov		o.......					Conditional Move - not overflow (OF=0)
CMOVNP	Gvqp	Evqp					0F	4B		TtTN	r	PP+					gen	datamov		......p.					Conditional Move - not parity/parity odd
CMOVPO	Gvqp	Evqp					0F	4B		TtTN	r	PP+					gen	datamov		......p.					Conditional Move - not parity/parity odd
CMOVNS	Gvqp	Evqp					0F	49		TttN	r	PP+					gen	datamov		...s....					Conditional Move - not sign (SF=0)
CMOVNZ	Gvqp	Evqp					0F	45		tTtN	r	PP+					gen	datamov		....z...					Conditional Move - not zero/not equal (ZF=1)
CMOVNE	Gvqp	Evqp					0F	45		tTtN	r	PP+					gen	datamov		....z...					Conditional Move - not zero/not equal (ZF=1)
CMOVO	Gvqp	Evqp					0F	40		tttn	r	PP+					gen	datamov		o.......					Conditional Move - overflow (OF=1)
CMOVP	Gvqp	Evqp					0F	4A		TtTn	r	PP+					gen	datamov		......p.					Conditional Move - parity/parity even (PF=1)
CMOVPE	Gvqp	Evqp					0F	4A		TtTn	r	PP+					gen	datamov		......p.					Conditional Move - parity/parity even (PF=1)
CMOVS	Gvqp	Evqp					0F	48		Tttn	r	PP+					gen	datamov		...s....					Conditional Move - sign (SF=1)
CMOVZ	Gvqp	Evqp					0F	44		tTtn	r	PP+					gen	datamov		....z...					Conditional Move - zero/equal (ZF=0)
CMOVE	Gvqp	Evqp					0F	44		tTtn	r	PP+					gen	datamov		....z...					Conditional Move - zero/equal (ZF=0)
CMP	Eb	Gb						38		dw	r						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Evqp	Gvqp						39		dW	r						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Gb	Eb						3A		Dw	r						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Gvqp	Evqp						3B		DW	r						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	AL	Ib						3C		w							gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	rAX	Ivds						3D		W							gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Eb	Ib						80		w	7						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Evqp	Ivds						81		W	7						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP alias	Eb	Ib						82		w	7						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMP	Evqp	Ibs						83		SW	7						gen	arith	binary		o..szapc	o..szapc			Compare Two Operands
CMPPD	Vpd	Wpd	Ib		sse2	66	0F	C2			r	P4+					pcksclr	compar							Compare Packed Double-FP Values
CMPPS	Vps	Wps	Ib		sse1		0F	C2			r	P3+					simdfp	compar							Compare Packed Single-FP Values
CMPS	Yb	Xb						A6		w							gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPSB	Yb	Xb						A6		w							gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPS	Yw	Xw						A7		W							gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPSW	Yw	Xw						A7		W							gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPS	Yv	Xv						A7		W		03+					gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPSD	Yd	Xd						A7		W		03+					gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPS	Yvqp	Xvqp						A7		W		P4+		E			gen	arith string	binary	.d......	o..szapc	o..szapc			Compare String Operands
CMPSW	Yw	Xw
CMPSD	Yd	Xd
CMPSQ	Yqp	Xqp
CMPSD	Vsd	Wsd	Ib		sse2	F2	0F	C2			r	P4+					pcksclr	compar							Compare Scalar Double-FP Values
CMPSS	Vss	Wss	Ib		sse1	F3	0F	C2			r	P3+					simdfp	compar							Compare Scalar Single-FP Values
CMPXCHG	Eb	AL	Gb				0F	B0		dw	r	04+				L	gen	datamov arith	binary		o..szapc	o..szapc			Compare and Exchange
CMPXCHG	Evqp	*rAX*	Gvqp				0F	B1		dW	r	04+				L	gen	datamov arith	binary		o..szapc	o..szapc			Compare and Exchange
CMPXCHG16B	Mdq	*RAX*	*RDX*	...			0F	C7			1	P4+	D²⁸	E		L	gen	datamov arith	binary		....z...	....z...			Compare and Exchange Bytes
CMPXCHG8B	Mq	*EAX*	*EDX*	...			0F	C7			1	P1+				L	gen	datamov arith	binary		....z...	....z...			Compare and Exchange Bytes
CMPXCHG8B	Mq	*EAX*	*EDX*	...			0F	C7			1	P4+		E		L	gen	datamov arith	binary		....z...	....z...			Compare and Exchange Bytes
COMISD	Vsd	Wsd			sse2	66	0F	2F			r	P4+					pcksclr	compar			....z.pc	....z.pc			Compare Scalar Ordered Double-FP Values and Set EFLAGS
COMISS	Vss	Wss			sse1		0F	2F			r	P3+					simdfp	compar			....z.pc	....z.pc			Compare Scalar Ordered Single-FP Values and Set EFLAGS
CPUID	*I...*	*EAX*	*ECX*	...			0F	A2				04++					gen	control							CPU Identification
CS	CS					2E											prefix	segreg							CS segment override prefix
CVTDQ2PD	Vpd	Wdq			sse2	F3	0F	E6			r	P4+					pcksclr	conver							Convert Packed DW Integers to Packed Double-FP Values
CVTDQ2PS	Vps	Wdq			sse2		0F	5B			r	P4+					pcksp								Convert Packed DW Integers to Packed Single-FP Values
CVTPD2DQ	Vdq	Wpd			sse2	F2	0F	E6			r	P4+					pcksclr	conver							Convert Packed Double-FP Values to Packed DW Integers
CVTPD2PI	Ppi	Wpd			sse2	66	0F	2D			r	P4+					pcksclr	conver							Convert Packed Double-FP Values to Packed DW Integers
CVTPD2PS	Vps	Wpd			sse2	66	0F	5A			r	P4+					pcksclr	conver							Convert Packed Double-FP Values to Packed Single-FP Values
CVTPI2PD	Vpd	Qpi			sse2	66	0F	2A			r	P4+					pcksclr	conver							Convert Packed DW Integers to Packed Double-FP Values
CVTPI2PS	Vps	Qpi			sse1		0F	2A			r	P3+					conver								Convert Packed DW Integers to Packed Single-FP Values
CVTPS2DQ	Vdq	Wps			sse2	66	0F	5B			r	P4+					pcksp								Convert Packed Single-FP Values to Packed DW Integers
CVTPS2PD	Vpd	Wps			sse2		0F	5A			r	P4+					pcksclr	conver							Convert Packed Single-FP Values to Packed Double-FP Values
CVTPS2PI	Ppi	Wpsq			sse1		0F	2D			r	P3+					conver								Convert Packed Single-FP Values to Packed DW Integers
CVTSD2SI	Gdqp	Wsd			sse2	F2	0F	2D			r	P4+					pcksclr	conver							Convert Scalar Double-FP Value to DW Integer
CVTSD2SS	Vss	Wsd			sse2	F2	0F	5A			r	P4+					pcksclr	conver							Convert Scalar Double-FP Value to Scalar Single-FP Value
CVTSI2SD	Vsd	Edqp			sse2	F2	0F	2A			r	P4+					pcksclr	conver							Convert DW Integer to Scalar Double-FP Value
CVTSI2SS	Vss	Edqp			sse1	F3	0F	2A			r	P3+					conver								Convert DW Integer to Scalar Single-FP Value
CVTSS2SD	Vsd	Wss			sse2	F3	0F	5A			r	P4+					pcksclr	conver							Convert Scalar Single-FP Value to Scalar Double-FP Value
CVTSS2SI	Gdqp	Wss			sse1	F3	0F	2D			r	P3+					conver								Convert Scalar Single-FP Value to DW Integer
CVTTPD2DQ	Vdq	Wpd			sse2	66	0F	E6			r	P4+					pcksclr	conver							Convert with Trunc. Packed Double-FP Values to Packed DW Integers
CVTTPD2PI	Ppi	Wpd			sse2	66	0F	2C			r	P4+					pcksclr	conver							Convert with Trunc. Packed Double-FP Values to Packed DW Integers
CVTTPS2DQ	Vdq	Wps			sse2	F3	0F	5B			r	P4+					pcksp								Convert with Trunc. Packed Single-FP Values to Packed DW Integers
CVTTPS2PI	Ppi	Wpsq			sse1		0F	2C			r	P3+					conver								Convert with Trunc. Packed Single-FP Values to Packed DW Integers
CVTTSD2SI	Gdqp	Wsd			sse2	F2	0F	2C			r	P4+					pcksclr	conver							Convert with Trunc. Scalar Double-FP Value to Signed DW Integer
CVTTSS2SI	Gdqp	Wss			sse1	F3	0F	2C			r	P3+					conver								Convert with Trunc. Scalar Single-FP Value to DW Integer
CWD	DX	AX						99									gen	conver							Convert Word to Doubleword
CWD	DX	AX						99				P4+		E			gen	conver							Convert
CDQ	*EDX*	EAX
CQO	*RDX*	RAX
CWDE	*EAX*	AX						98				03+					gen	conver							Convert Word to Doubleword
DAA	AL							27									gen	arith	decimal	.....a.c	o..szapc	...szapc	o.......		Decimal Adjust AL after Addition
DAS	AL							2F									gen	arith	decimal	.....a.c	o..szapc	...szapc	o.......		Decimal Adjust AL after Subtraction
DEC	Zv							48		+r							gen	arith	binary		o..szap.	o..szap.			Decrement by 1
DEC	Eb							FE		w	1						gen	arith	binary		o..szap.	o..szap.			Decrement by 1
DEC	Evqp							FF		W	1						gen	arith	binary		o..szap.	o..szap.			Decrement by 1
DIV	AL	AH	AX	Eb				F6		w	6						gen	arith	binary		o..szapc		o..szapc		Unsigned Divide
DIV	*rDX*	*rAX*	Evqp					F7		w	6						gen	arith	binary		o..szapc		o..szapc		Unsigned Divide
DIVPD	Vpd	Wpd			sse2	66	0F	5E			r	P4+					pcksclr	arith							Divide Packed Double-FP Values
DIVPS	Vps	Wps			sse1		0F	5E			r	P3+					simdfp	arith							Divide Packed Single-FP Values
DIVSD	Vsd	Wsd			sse2	F2	0F	5E			r	P4+					pcksclr	arith							Divide Scalar Double-FP Values
DIVSS	Vss	Wss			sse1	F3	0F	5E			r	P3+					simdfp	arith							Divide Scalar Single-FP Values
DS	DS					3E											prefix	segreg							DS segment override prefix
EMMS					mmx		0F	77				PX+													Empty MMX Technology State
ENTER	*rBP*	Iw	Ib					C8				01+					gen	stack							Make Stack Frame for Procedure Parameters
ES	ES					26											prefix	segreg							ES segment override prefix
F2XM1	ST							D9	F0		6						x87fpu	trans			0123	.1..	0.23		Compute 2^x-1
FABS	ST							D9	E1		4						x87fpu	arith			0123	.1..	0.23		Absolute Value
FADD	ST	Msr						D8		mf	0						x87fpu	arith			0123	.1..	0.23		Add
FADD	ST	EST						D8		mf	0						x87fpu	arith			0123	.1..	0.23		Add
FADD	ST	Mdr						DC		Mf	0						x87fpu	arith			0123	.1..	0.23		Add
FADD	EST	ST						DC			0						x87fpu	arith			0123	.1..	0.23		Add
FADDP	EST	ST						DE			0					p	x87fpu	arith			0123	.1..	0.23		Add and Pop
FADDP	*ST1*	ST						DE	C1		0					p	x87fpu	arith			0123	.1..	0.23		Add and Pop
FBLD	ST	Mbcd						DF			4					s	x87fpu	datamov			0123	.1..	0.23		Load Binary Coded Decimal
FBSTP	Mbcd	ST						DF			6					p	x87fpu	datamov			0123	.1..	0.23		Store BCD Integer and Pop
FCHS	ST							D9	E0		4						x87fpu	arith			0123	.1..	0.23		Change Sign
FCLEX						9B		DB	E2		4						x87fpu	control			0123		0123		Clear Exceptions
FCMOVB	ST	EST						DA			0	PP+					x87fpu	datamov		.......c	0123	.1..	0.23		Floating-Point Conditional Move - below (CF=1)
FCMOVBE	ST	EST						DA			2	PP+					x87fpu	datamov		....z...	0123	.1..	0.23		Floating-Point Conditional Move - below or equal (CF=1 or ZF=1)
FCMOVE	ST	EST						DA			1	PP+					x87fpu	datamov		....z...	0123	.1..	0.23		Floating-Point Conditional Move - equal (ZF=1)
FCMOVNB	ST	EST						DB			0	PP+					x87fpu	datamov		.......c	0123	.1..	0.23		Floating-Point Conditional Move - not below (CF=0)
FCMOVNBE	ST	EST						DB			2	PP+					x87fpu	datamov		....z...	0123	.1..	0.23		Floating-Point Conditional Move - below or equal (CF=0 and ZF=0)
FCMOVNE	ST	EST						DB			1	PP+					x87fpu	datamov		....z...	0123	.1..	0.23		Floating-Point Conditional Move - not equal (ZF=0)
FCMOVNU	ST	EST						DB			3	PP+					x87fpu	datamov		......p.	0123	.1..	0.23		Floating-Point Conditional Move - not unordered (PF=0)
FCMOVU	ST	EST						DA			3	PP+					x87fpu	datamov		......p.	0123	.1..	0.23		Floating-Point Conditional Move - unordered (PF=1)
FCOM	ST	ESsr						D8		mf	2						x87fpu	compar			0123	0123			Compare Real
FCOM	ST	ST1						D8	D1		2						x87fpu	compar			0123	0123			Compare Real
FCOM	ST	Mdr						DC		Mf	2						x87fpu	compar			0123	0123			Compare Real
FCOM2 alias	ST	EST						DC			2		D⁹				x87fpu	compar			0123	0123			Compare Real
FCOM2 alias	ST	EST						DC			2	03+	U¹³				x87fpu	compar			0123	0123			Compare Real
FCOMI	ST	EST						DB			6	PP+					x87fpu	compar			o...z.pc .1..	o...z.pc .1..		o.......	Compare Floating Point Values and Set EFLAGS
FCOMIP	ST	EST						DF			6	PP+				p	x87fpu	compar			o...z.pc .1..	o...z.pc .1..		o.......	Compare Floating Point Values and Set EFLAGS and Pop
FCOMP	ST	ESsr						D8		mf	3					p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP	ST	ST1						D8	D9		3					p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP	ST	Mdr						DC		Mf	3					p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP3 alias	ST	EST						DC			3		D¹⁰			p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP3 alias	ST	EST						DC			3	03+	U¹³			p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP5 alias	ST	EST						DE			2		D¹⁰			p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMP5 alias	ST	EST						DE			2	03+	U¹³			p	x87fpu	compar			0123	0123			Compare Real and Pop
FCOMPP	ST	ST1						DE	D9		3					P	x87fpu	compar			0123	0123			Compare Real and Pop Twice
FCOS	ST							D9	FF		7						x87fpu	trans			0123	.12.	0..3		Cosine
FDECSTP								D9	F6		6						x87fpu	control			0123	.1..	0.23	.0..	Decrement Stack-Top Pointer
FDISI						9B		DB	E1		4	00					x87fpu	control							Disable NPX Interrupt
FDIV	ST	Msr						D8		mf	6						x87fpu	arith			0123	.1..	0.23		Divide
FDIV	ST	EST						D8		mf	6						x87fpu	arith			0123	.1..	0.23		Divide
FDIV	ST	Mdr						DC		Mf	6						x87fpu	arith			0123	.1..	0.23		Divide
FDIV	EST	ST						DC			7						x87fpu	arith			0123	.1..	0.23		Divide and Pop
FDIVP	EST	ST						DE			7					p	x87fpu	arith			0123	.1..	0.23		Divide and Pop
FDIVP	*ST1*	ST						DE	F9		7					p	x87fpu	arith			0123	.1..	0.23		Divide and Pop
FDIVR	ST	Msr						D8		mf	7						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FDIVR	ST	EST						D8		mf	7						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FDIVR	EST	ST						DC			6						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FDIVR	ST	Mdr						DC		Mf	7						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FDIVRP	EST	ST						DE			6					p	x87fpu	arith			0123	.1..	0.23		Reverse Divide and Pop
FDIVRP	*ST1*	ST						DE	F1		6					p	x87fpu	arith			0123	.1..	0.23		Reverse Divide and Pop
FENI						9B		DB	E0		4	00					x87fpu	control							Enable NPX Interrupt
FFREE	EST							DD			0						x87fpu	control			0123		0123		Free Floating-Point Register
FFREEP	EST							DF			0		D¹²			p	x87fpu	control			0123		0123		Free Floating-Point Register and Pop
FIADD	ST	Mdi						DA		mF	0						x87fpu	arith			0123	.1..	0.23		Add
FIADD	ST	Mwi						DE		MF	0						x87fpu	arith			0123	.1..	0.23		Add
FICOM	ST	Mdi						DA		mF	2						x87fpu	compar			0123	0123			Compare Integer
FICOM	ST	Mwi						DE		MF	2						x87fpu	compar			0123	0123			Compare Integer
FICOMP	ST	Mdi						DA		mF	3					p	x87fpu	compar			0123	0123			Compare Integer and Pop
FICOMP	ST	Mwi						DE		MF	3					p	x87fpu	compar			0123	0123			Compare Integer and Pop
FIDIV	ST	Mdi						DA		mF	6						x87fpu	arith			0123	.1..	0.23		Divide
FIDIV	ST	Mwi						DE		MF	6						x87fpu	arith			0123	.1..	0.23		Divide
FIDIVR	ST	Mdi						DA		mF	7						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FIDIVR	ST	Mwi						DE		MF	7						x87fpu	arith			0123	.1..	0.23		Reverse Divide
FILD	ST	Mdi						DB		mF	0					s	x87fpu	datamov			0123	.1..	0.23		Load Integer
FILD	ST	Mwi						DF		MF	0					s	x87fpu	datamov			0123	.1..	0.23		Load Integer
FILD	ST	Mqi						DF			5					s	x87fpu	datamov			0123	.1..	0.23		Load Integer
FIMUL	ST	Mdi						DA		mF	1						x87fpu	arith			0123	.1..	0.23		Multiply
FIMUL	ST	Mwi						DE		MF	1						x87fpu	arith			0123	.1..	0.23		Multiply
FINCSTP								D9	F7		6						x87fpu	control			0123	.1..	0.23	.0..	Increment Stack-Top Pointer
FINIT						9B		DB	E3		4						x87fpu	control			0123			0000	Initialize Floating-Point Unit
FIST	Mdi	ST						DB		mF	2						x87fpu	datamov			0123	.1..	0.23		Store Integer
FIST	Mwi	ST						DF		MF	2						x87fpu	datamov			0123	.1..	0.23		Store Integer
FISTP	Mdi	ST						DB		mF	3					p	x87fpu	datamov			0123	.1..	0.23		Store Integer and Pop
FISTP	Mwi	ST						DF		MF	3					p	x87fpu	datamov			0123	.1..	0.23		Store Integer and Pop
FISTP	Mqi	ST						DF			7					p	x87fpu	datamov			0123	.1..	0.23		Store Integer and Pop
FISTTP	Mdi	ST			sse3			DB		mF	1	P4++				p	x87fpu	conv			0123	.1..	0.23	.0..	Store Integer with Truncation and Pop
FISTTP	Mqi	ST			sse3			DD			1	P4++				p	x87fpu	conv			0123	.1..	0.23	.0..	Store Integer with Truncation and Pop
FISTTP	Mwi	ST			sse3			DF		MF	1	P4++				p	x87fpu	conv			0123	.1..	0.23	.0..	Store Integer with Truncation and Pop
FISUB	ST	Mdi						DA		mF	4						x87fpu	arith			0123	.1..	0.23		Subtract
FISUB	ST	Mwi						DE		MF	4						x87fpu	arith			0123	.1..	0.23		Subtract
FISUBR	ST	Mdi						DA		mF	5						x87fpu	arith			0123	.1..	0.23		Reverse Subtract
FISUBR	ST	Mwi						DE		MF	5						x87fpu	arith			0123	.1..	0.23		Reverse Subtract
FLD	ST	ESsr						D9		mf	0					s	x87fpu	datamov			0123	.1..	0.23		Load Floating Point Value
FLD	ST	Mer						DB			5					s	x87fpu	datamov			0123	.1..	0.23		Load Floating Point Value
FLD	ST	Mdr						DD		Mf	0					s	x87fpu	datamov			0123	.1..	0.23		Load Floating Point Value
FLD1	ST							D9	E8		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant +1.0
FLDCW	Mw							D9			5						x87fpu	control			0123		0123		Load x87 FPU Control Word
FLDENV	Me							D9			4						x87fpu	control			0123	0123			Load x87 FPU Environment
FLDL2E	ST							D9	EA		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant log₂e
FLDL2T	ST							D9	E9		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant log₂10
FLDLG2	ST							D9	EC		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant log₁₀2
FLDLN2	ST							D9	ED		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant log_e2
FLDPI	ST							D9	EB		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant π
FLDZ	ST							D9	EE		5					s	x87fpu	ldconst			0123	.1..	0.23		Load Constant +0.0
FMUL	ST	Msr						D8		mf	1						x87fpu	arith			0123	.1..	0.23		Multiply
FMUL	ST	EST						D8		mf	1						x87fpu	arith			0123	.1..	0.23		Multiply
FMUL	ST	Mdr						DC		Mf	1						x87fpu	arith			0123	.1..	0.23		Multiply
FMUL	EST	ST						DC			1						x87fpu	arith			0123	.1..	0.23		Multiply
FMULP	EST	ST						DE			1					p	x87fpu	arith			0123	.1..	0.23		Multiply and Pop
FMULP	*ST1*	ST						DE	C9		1					p	x87fpu	arith			0123	.1..	0.23		Multiply and Pop
FNCLEX								DB	E2		4						x87fpu	control			0123		0123		Clear Exceptions
FNDISI								DB	E1		4	00					x87fpu	control							Disable NPX Interrupt
FNDISI nop								DB	E1		4	01+	D⁷				obsol	control							Treated as Integer NOP
FNENI								DB	E0		4	00					x87fpu	control							Enable NPX Interrupt
FNENI nop								DB	E0		4	01+	D⁷				obsol	control							Treated as Integer NOP
FNINIT								DB	E3		4						x87fpu	control			0123			0000	Initialize Floating-Point Unit
FNOP								D9	D0		2						x87fpu	control			0123		0123		No Operation
FNSAVE	Mst	ST	ST1	...				DD			6						x87fpu	control			0123	0123		0000	Store x87 FPU State
FNSETPM								DB	E4		4	02					x87fpu	control							Set Protected Mode
FNSETPM nop								DB	E4		4	03+	D⁸				obsol	control							Treated as Integer NOP
FNSTCW	Mw							D9			7						x87fpu	control			0123		0123		Store x87 FPU Control Word
FNSTENV	Me							D9			6						x87fpu	control			0123		0123		Store x87 FPU Environment
FNSTSW	Mw							DD			7						x87fpu	control			0123		0123		Store x87 FPU Status Word
FNSTSW	AX							DF	E0		4	02+					x87fpu	control			0123		0123		Store x87 FPU Status Word
FPATAN	*ST1*	ST						D9	F3		6					p	x87fpu	trans			0123	.1..	0.23		Partial Arctangent and Pop
FPREM	ST	ST1						D9	F8		7						x87fpu	arith			0123	0123			Partial Remainder (for compatibility with i8087 and i287)
FPREM1	ST	ST1						D9	F5		6						x87fpu	arith			0123	0123			IEEE Partial Remainder
FPTAN	ST							D9	F2		6					s	x87fpu	trans			0123	.12.	0..3		Partial Tangent
FRNDINT	ST							D9	FC		7						x87fpu	arith			0123	.1..	0.23		Round to Integer
FRSTOR	ST	*ST1*	*ST2*	...				DD			4						x87fpu	control			0123	0123			Restore x87 FPU State
FS	FS					64						03+					prefix	segreg							FS segment override prefix
FSAVE	Mst	ST	ST1	...		9B		DD			6						x87fpu	control			0123	0123		0000	Store x87 FPU State
FSCALE	ST	ST1						D9	FD		7						x87fpu	arith			0123	.1..	0.23		Scale
FSETPM						9B		DB	E4		4	02					x87fpu	control							Set Protected Mode
FSIN	ST							D9	FE		7						x87fpu	trans			0123	.12.	0..3		Sine
FSINCOS	ST							D9	FB		7					s	x87fpu	trans			0123	.12.	0..3		Sine and Cosine
FSQRT	ST							D9	FA		7						x87fpu	arith			0123	.1..	0.23		Square Root
FST	Msr	ST						D9		mf	2						x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value
FST	Mdr	ST						DD		Mf	2						x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value
FST	ST	EST						DD			2						x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value
FSTCW	Mw					9B		D9			7						x87fpu	control			0123		0123		Store x87 FPU Control Word
FSTENV	Me					9B		D9			6						x87fpu	control			0123		0123		Store x87 FPU Environment
FSTP	Msr	ST						D9		mf	3					p	x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value and Pop
FSTP	Mer	ST						DB			7					p	x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value and Pop
FSTP	Mdr	ST						DD		Mf	3					p	x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value and Pop
FSTP	ST	EST						DD			3					p	x87fpu	datamov			0123	.1..	0.23		Store Floating Point Value and Pop
FSTP1 part alias